Mercurial > hg-public > freeslot / changeset

--- a/blackbox/main.h	Sat Dec 03 16:42:53 2011 +0100
+++ b/blackbox/main.h	Mon Dec 05 17:14:32 2011 +0100
@@ -77,6 +77,8 @@
 #define TIMER2_DIVISOR  8
 #define VALUE2_50US     0.50e-4
 #define TIMER2_50US     (uint8_t)(VALUE2_50US * F_CPU/TIMER2_DIVISOR)
+#define VALUE2_250US    2.5e-4
+#define TIMER2_250US    (uint8_t)((VALUE2_250US * F_CPU/TIMER2_DIVISOR) - 2)
 
 #define TIMER1_DIVISOR  8
 #define VALUE1_7500NS   0.75e-2

--- a/carrerashark/README	Sat Dec 03 16:42:53 2011 +0100
+++ b/carrerashark/README	Mon Dec 05 17:14:32 2011 +0100
@@ -15,4 +15,6 @@
 Debug Pins:
     PD3 = Packet Start pulse
     PD4 = Bit timer pulse (50ns)
-    PD5 = Cycle Sync: each low/high change == start of cycle (after program packet received)
\ No newline at end of file
+    PD5 = Cycle Sync: each low/high change == start of cycle (after program packet received)
+    PD6 = sysclk @ 256µs
+    PD7 = response indicator
\ No newline at end of file

--- a/carrerashark/TRACE	Sat Dec 03 16:42:53 2011 +0100
+++ b/carrerashark/TRACE	Mon Dec 05 17:14:32 2011 +0100
@@ -46,3 +46,8 @@
 
 TANKSTAND:
     Die alte CU gibt den Komponenten keinerlei Möglichkeit einer Antwort (die antwort-Peaks fehlen!!!)
+
+TANKSENSOR (neue Pitlane):
+    das Zusatzmodul sendet Informationen zurueck an die CU, sobald ein Auto mit Speed >0 darueber faehrt!
+    Folgendes Paket:
+    
\ No newline at end of file

--- a/carrerashark/main.c	Sat Dec 03 16:42:53 2011 +0100
+++ b/carrerashark/main.c	Mon Dec 05 17:14:32 2011 +0100
@@ -12,11 +12,10 @@
 #include "util/delay.h"
 
 
-static char buffer[RS232_BUFSIZE+1];
-static uint8_t buffer_len;
+volatile char buffer[RS232_BUFSIZE+1];
+volatile uint8_t buffer_len = 0;
 
-
-
+volatile uint8_t showall = 0;
 
 // USART0 RX interrupt
 ISR ( USART_RXC_vect ) {
@@ -35,10 +34,18 @@
             // escape sequence, clear buffer
             buffer_len = 0;
             buffer[buffer_len++] = c;
-        } else if ( (c==0xff) && (buffer_len > 3) ) {
+        } else if ( (c=='\n') && (buffer_len > 3) ) {
             buffer[buffer_len]=0;
 
             // packet end received, parse the received packet
+            if (buffer[0] == 'A') {
+                showall = 1;
+                RS232_puts_p(PSTR("Entering Livemode\n"));
+            }
+            if (buffer[0] == 'C') {
+                showall = 0;
+                RS232_puts_p(PSTR("Showing only changes\n"));
+            }
 
             // wait for the next packet
             buffer_len=0;
@@ -54,27 +61,44 @@
 
 volatile uint16_t data = 0;
 volatile uint8_t data_len = 0;
+volatile uint16_t response = 0;
+volatile uint8_t response_len = 0;
 volatile uint8_t bitbuf_len = 0;
 volatile uint16_t bitbuf = 0;
 
-volatile uint16_t sysclock = 0;
+volatile uint8_t sysclock = 0;
 ISR ( TIMER0_OVF_vect ) {
     PORTD ^= _BV(PD6);
-    if (sysclock != 0xffff) sysclock++;
+    if (sysclock != 0xff) sysclock++;
 }
 
 ISR ( INT0_vect ) {
     PORTD ^= _BV(PD3);
-    if (sysclock<10) {
+    if ((sysclock > 0) && (sysclock<10)) {
         // this is the answer slot start bit??
-        PORTD ^= _BV(PD7);
+        // configure the bitbuf to start receive of answer data
+        if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) != 0) {
+            PORTD ^= _BV(PD7); // set indicator
+            OCR2 = TIMER2_250US;
+            GICR &= ~_BV(INT0) ; // Disable INT0
+            bitbuf = 0; // init
+            bitbuf_len = 0b00100000; // init zero, first pulse is checked by timer, set answer receive flag!
+            // START BIT RECEIVED!
+            //OCR2 = TIMER2_250US;
+            TCNT2 = 1;
+            TIMSK |= _BV(OCIE2); //enable timer2 interrupt
+        } else {
+            OCR2 = TIMER2_50US;
+        }
+
     } else {
-    GICR &= ~_BV(INT0) ; // Disable INT0
+        GICR &= ~_BV(INT0) ; // Disable INT0
         // Startsignal erkannt, ab hier den Timer2 starten,
         // der liest dann alle 50µs den Zustand ein und schreibt das
         // empfangene Bit in den Puffer
         bitbuf = 0; // init
         bitbuf_len = 0b10000000; // init 1 pulse received
+        OCR2 = TIMER2_50US;
         TCNT2 = 0;
         TIMSK |= _BV(OCIE2); //enable timer2 interrupt
     }
@@ -83,37 +107,58 @@
 
 ISR ( TIMER2_COMP_vect ) {
     PORTD ^= _BV(PD4);
-    uint8_t clock;
-    uint8_t state;
-    uint8_t state2;
-    if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff;
-    if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff;
+    uint8_t clock, state, state2, rxa;
+
+
+    if ((bitbuf_len & 0b00100000) == 0) rxa = 0; else rxa = 0xff;
     if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff;
 
-    if (clock) {
-        // second pulse of bit
-        bitbuf_len &= ~_BV(7); // switch clock to low
-        if ((state==state2) & state2) {
-            // two cycles high: packet end received
-            data_len = (bitbuf_len & 0b00111111);
-            if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets
+    if (rxa == 0) {
+        // receive a standard packet
+        if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff;
+        if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff;
+
+        if (clock) {
+            // second pulse of bit
+            bitbuf_len &= ~_BV(7); // switch clock to low
+            if ((state==state2) & state2) {
+                // two cycles high: packet end received
+                data_len = (bitbuf_len & 0b00011111);
+                data = bitbuf; // output data
+                if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets
+                sysclock = 0; // reset system clock counter
+                TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt
+                GICR |= _BV(INT0); // Enable INT0
+//                GIFR &= ~_BV(INTF0); // clear int0 irq flag
+            } else {
+                bitbuf_len++; // increment bit counter
+                bitbuf = bitbuf << 1; // shift bits
+                if (state2 == 0) bitbuf |= 1; // receive logic one
+            }
+        } else {
+            // first pulse of bit
+            bitbuf_len |= _BV(7); // switch clock to high
+            if (state2) {
+                bitbuf_len |= _BV(6); // store new state
+            } else {
+                bitbuf_len &= ~_BV(6); // store new state
+            }
+        }
+    } else {
+        // receive an answer packet!
+        if ((bitbuf_len & 0xF) < 0xE) {
+            // receive one of max 15 bits to buffer
+            bitbuf_len++;
+            bitbuf = bitbuf << 1; // shift bits
+            if (state2 != 0) bitbuf |= 1; // receive logic one
+        } else {
+            OCR2 = TIMER2_50US;
+            // END OF ANSWER
+            response_len = (bitbuf_len & 0b00011111);
+            response = bitbuf; // output data (full 16bits)
+            PORTD ^= _BV(PD7);
             TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt
             GICR |= _BV(INT0); // Enable INT0
-            GIFR &= ~_BV(INTF0); // clear int0 irq flag
-            data = bitbuf; // output data
-            sysclock = 0; // reset system clock counter
-        } else {
-            bitbuf_len++; // increment bit counter
-            bitbuf = bitbuf << 1; // shift bits
-            if (state2 == 0) bitbuf |= 1; // receive logic one
-        }
-    } else {
-        // first pulse of bit
-        bitbuf_len |= _BV(7); // switch clock to high
-        if (state2) {
-            bitbuf_len |= _BV(6); // store new state
-        } else {
-            bitbuf_len &= ~_BV(6); // store new state
         }
     }
 }
@@ -122,10 +167,11 @@
 
 int main(void)
 {
-    uint8_t i;
+    uint8_t i, cycle_changed;
     unsigned char s[10];
     uint16_t tmp;
     uint16_t cycle[11];
+    uint16_t cycle_old[11];
 
     // setup data bit timer
     TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match
@@ -137,7 +183,7 @@
     TIMSK |= 1<<TOIE0; //enable timer0 interrupt
 
 
-    MCUCR = _BV(ISC00); // falling edge
+    MCUCR = _BV(ISC01); // falling edge
 //    MCUCR = _BV(ISC00) | _BV(ISC01); // rising edge
     GICR = _BV(INT0) ; // Enable INT0
 
@@ -145,28 +191,45 @@
     PORTD |= _BV(PD7);
 
     RS232_init(); // initialize RS232 interface
-    RS232_puts_p(PSTR("CarreraShark 1.2\n"));
+    RS232_puts_p(PSTR("CarreraShark 1.2\nA = Show all data live\nC = Show only when data changes"));
 
     sei();
     i = 0;
     while (1) {
         // main loop
 
+        if (response != 0) {
+            RS232_puts_p(PSTR("RX: "));
+            itoa(response, s, 2);
+            response = 0;
+            RS232_puts( s );
+            RS232_putc('\n');
+            while (1) ;
+        }
+
         if (data != 0) {
             if (data_len > 5) {
                 tmp = data;
                 data = 0;
                 if (data_len == 13) { // sync to first packet
                     PORTD ^= _BV(PD5);
-                    for (i=0; i<10;i++ ) {
-                        // output previous cycle data
-                        itoa( cycle[i], s, 16);
-                        RS232_putc('0');
-                        RS232_putc('x');
-                        RS232_puts( s );
-                        RS232_putc(' ');
+                    if (showall == 0) {
+                        // compare old & new cycle
+                        cycle_changed = 0;
+                        for (i=0; i<10;i++ ) if (cycle[i] != cycle_old[i]) cycle_changed = 1;
                     }
-                    RS232_putc('*');
+                    if ( (showall != 0) || (cycle_changed != 0) ) {
+                        for (i=0; i<10;i++ ) {
+                            // output previous cycle data
+                            itoa( cycle[i], s, 16);
+                            RS232_putc('0');
+                            RS232_putc('x');
+                            RS232_puts( s );
+                            RS232_putc(' ');
+                        }
+                        if (showall != 0) RS232_putc('*'); else RS232_putc('\n');
+                    }
+                    if (showall == 0) for (i=0; i<10;i++ ) cycle_old[i] = cycle[i];
                     i = 0;
                     PORTD ^= _BV(PD5);
                 }