Fri, 18 Nov 2011 12:16:22 +0100
added carrerashark project-part to separate subdirectory
carrerashark/Makefile | file | annotate | diff | comparison | revisions | |
carrerashark/README | file | annotate | diff | comparison | revisions | |
carrerashark/driver | file | annotate | diff | comparison | revisions | |
carrerashark/main.c | file | annotate | diff | comparison | revisions | |
carrerashark/main.h | file | annotate | diff | comparison | revisions |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/carrerashark/Makefile Fri Nov 18 12:16:22 2011 +0100 @@ -0,0 +1,92 @@ +PRG=main + +MCU=atmega16 +FUSES=-U lfuse:w:0x2f:m -U hfuse:w:0xc8:m +BOOTFUSES=-U lfuse:w:0xff:m -U hfuse:w:0xce:m + +#F_CPU=4185600 +#F_CPU = 14318000 + +F_CPU = 8000000 + +BAUD=38400 +ISP_BAUD = 115200 + +#SRC = main.c seriald.c driver/ADC.c driver/clock.c driver/timer.c +#SRC = main.c driver/rs232.c driver/manchester.c +SRC = main.c driver/rs232.c + +################################################################### +# You possibly do not need to change settings below this marker +################################################################### + +# Binaries to be used +# You may add the path to them if they are not in the PATH variable. +CC = avr-gcc +OBJCOPY = avr-objcopy +OBJDUMP = avr-objdump +AVRDUDE = avrdude +PERL = perl + +# Optional library search path +LIBS = + +# Compiler options for all c source files +CFLAGS += -g -Wall -mmcu=$(MCU) -DBAUD=$(BAUD) -DF_CPU=$(F_CPU)UL -std=gnu99 +CFLAGS += -funsigned-char +CFLAGS += -funsigned-bitfields +CFLAGS += -fpack-struct +CFLAGS += -fshort-enums +CFLAGS += -Wstrict-prototypes +CFLAGS += -Wundef +#CFLAGS += -save-temps + +# optimize for size +CFLAGS += -Os +# dont optimize +#CFLAGS += -O0 + +# Linker options +LDFLAGS = -Wl,-Map,$(PRG).map + +# Enable floating-point support in printf +#LDFLAGS += -Wl,-u,vfprintf -lprintf_flt -lm + +################################################################### +# TARGET DEFINITIONS: + + +all: code + +code: $(PRG).hex + +$(PRG).elf: $(SRC:.c=.o) + $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS) + +%.lst: %.elf + $(OBJDUMP) -h -S $< > $@ + +%.hex: %.elf + $(OBJCOPY) -j .text -j .data -O ihex $< $@ + rm $(PRG).elf + rm $(PRG).map + +program: code + $(AVRDUDE) -c stk500v2 -b $(ISP_BAUD) -i 1 -p $(MCU) -V -U flash:w:$(PRG).hex:i + +fuse: + $(AVRDUDE) -c stk500 -p $(MCU) -V $(FUSES) + +clean: + rm -rf *.o *.elf *.elf.src *.s *.i + rm -rf driver/*.o + +upgrade: code + $(RESETCOMMAND) + ./bootloader -d $(NETDEV) -b $(UPGRADE_BAUD) -p $(PRG).hex + +bootloader: bootload.hex + $(AVRDUDE) -p $(MCU) -c stk500 -V -U flash:w:bootload.hex:i + +bootfuses: + $(AVRDUDE) -p $(MCU) -c stk500 $(BOOTFUSES)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/carrerashark/README Fri Nov 18 12:16:22 2011 +0100 @@ -0,0 +1,18 @@ +CarreraShark +Rail data packet sniffer + +Hardware: Mega16, 8mhz + PD2 = Controller Input + |>o = Inv Schmitt Trigger for signal buffering (74hc14) + + [RAIL+] ------[33kohm]------+-----|>o--|>0----[PD2] + | + --[10kohm]--- + | + [RAIL-] --------------------------------+-----[GND] + + +Debug Pins: + PD3 = Packet Start pulse + PD4 = Bit timer pulse (50ns) + PD5 = Cycle Sync: each low/high change == start of cycle (after program packet received) \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/carrerashark/driver Fri Nov 18 12:16:22 2011 +0100 @@ -0,0 +1,1 @@ +../blackbox/driver \ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/carrerashark/main.c Fri Nov 18 12:16:22 2011 +0100 @@ -0,0 +1,160 @@ +#include <avr/interrupt.h> +#include <avr/io.h> +#include <avr/wdt.h> +#include <avr/eeprom.h> +#include <stdlib.h> +#include <stdint.h> +#include <avr/pgmspace.h> + +#include "main.h" + +#include "driver/rs232.h" +#include "util/delay.h" + + +static char buffer[RS232_BUFSIZE+1]; +static uint8_t buffer_len; + + + + +// USART0 RX interrupt +ISR ( USART_RXC_vect ) { + char c = UDR; + + // check for buffer overflow + if (buffer_len==sizeof(buffer)) { + buffer_len=0; + if (c == 27) { + // escape sequence, store to empty buffer + buffer[buffer_len++] = c; + } + } else { + // collect characters until end of line + if (c == 27) { + // escape sequence, clear buffer + buffer_len = 0; + buffer[buffer_len++] = c; + } else if ( (c==0xff) && (buffer_len > 3) ) { + buffer[buffer_len]=0; + + // packet end received, parse the received packet + + // wait for the next packet + buffer_len=0; + } else { + buffer[buffer_len++]=c; + } + } +} + + +#define PULSE_PORT PORTD +#define PULSE_BIT PD2 + +volatile uint16_t data = 0; +volatile uint8_t data_len = 0; +volatile uint8_t bitbuf_len = 0; +volatile uint16_t bitbuf = 0; + +ISR ( INT0_vect ) { + writeBit(PORTD, 5, 1); + GICR &= ~_BV(INT0) ; // Disable INT0 + // Startsignal erkannt, ab hier den Timer2 starten, + // der liest dann alle 50µs den Zustand ein und schreibt das + // empfangene Bit in den Puffer + bitbuf = 0; // init + bitbuf_len = 0b10000000; // init 1 pulse received + TCNT2 = 0; + TIMSK |= _BV(OCIE2); //enable timer2 interrupt + writeBit(PORTD, 5, 0); +} + + +ISR ( TIMER2_COMP_vect ) { + writeBit(PORTD, 4, 0); + + uint8_t clock; + uint8_t state; + uint8_t state2; + if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff; + if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff; + if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff; + + if (clock) { + // second pulse of bit + bitbuf_len &= ~_BV(7); // switch clock to low + if ((state==state2) & state2) { + // two cycles high: packet end received + data_len = (bitbuf_len & 0b00111111); + if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets + TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt + GICR |= _BV(INT0) ; // Enable INT0 + data = bitbuf; // output data + } else { + bitbuf_len++; // increment bit counter + bitbuf = bitbuf << 1; // shift bits + if (state2 == 0) bitbuf |= 1; // receive logic one + } + } else { + // first pulse of bit + bitbuf_len |= _BV(7); // switch clock to high + if (state2) { + bitbuf_len |= _BV(6); // store new state + } else { + bitbuf_len &= ~_BV(6); // store new state + } + } + + + writeBit(PORTD, 4, 1); +} + + + +int main(void) +{ + uint8_t i; + unsigned char s[30]; + + // setup data bit timer + TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match + OCR2 = TIMER2_50US; + TIMSK |= 1<<OCIE2; //enable timer2 interrupt + + MCUCR = _BV(ISC00); // falling edge + GICR = _BV(INT0) ; // Enable INT0 + + writeBit(DDRD, 4, 1); + writeBit(DDRD, 5, 1); + writeBit(DDRD, 6, 1); + + + RS232_init(); // initialize RS232 interface + RS232_puts_p(PSTR("CarreraShark 1.0 - INIT OK\n")); + //RS232_puts_p(PSTR("Receiving one complete cycle:\n")); + + sei(); + i = 0; + while (1) { + // main loop + + if (data != 0) { + if (data_len > 5) { + if (data_len == 13) { // sync to first packet + i = 1; + RS232_puts("\n"); + } else if (i!=0) i++; + if (i>0) { + itoa( data, s, 16); + data = 0; + RS232_puts("0x"); + RS232_puts( s ); + RS232_putc(' '); + } + } + //if (i==10) for (;;); + } + } // main loop end +}; +