comparison: carrerashark/main.c
carrerashark/main.c
- changeset 12
- a399f9d5e672
- child 28
- d4235895fdbc
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inserted
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| 11:69c2a1408619 | 12:a399f9d5e672 |
|---|---|
| 1 #include <avr/interrupt.h> | |
| 2 #include <avr/io.h> | |
| 3 #include <avr/wdt.h> | |
| 4 #include <avr/eeprom.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <stdint.h> | |
| 7 #include <avr/pgmspace.h> | |
| 8 | |
| 9 #include "main.h" | |
| 10 | |
| 11 #include "driver/rs232.h" | |
| 12 #include "util/delay.h" | |
| 13 | |
| 14 | |
| 15 static char buffer[RS232_BUFSIZE+1]; | |
| 16 static uint8_t buffer_len; | |
| 17 | |
| 18 | |
| 19 | |
| 20 | |
| 21 // USART0 RX interrupt | |
| 22 ISR ( USART_RXC_vect ) { | |
| 23 char c = UDR; | |
| 24 | |
| 25 // check for buffer overflow | |
| 26 if (buffer_len==sizeof(buffer)) { | |
| 27 buffer_len=0; | |
| 28 if (c == 27) { | |
| 29 // escape sequence, store to empty buffer | |
| 30 buffer[buffer_len++] = c; | |
| 31 } | |
| 32 } else { | |
| 33 // collect characters until end of line | |
| 34 if (c == 27) { | |
| 35 // escape sequence, clear buffer | |
| 36 buffer_len = 0; | |
| 37 buffer[buffer_len++] = c; | |
| 38 } else if ( (c==0xff) && (buffer_len > 3) ) { | |
| 39 buffer[buffer_len]=0; | |
| 40 | |
| 41 // packet end received, parse the received packet | |
| 42 | |
| 43 // wait for the next packet | |
| 44 buffer_len=0; | |
| 45 } else { | |
| 46 buffer[buffer_len++]=c; | |
| 47 } | |
| 48 } | |
| 49 } | |
| 50 | |
| 51 | |
| 52 #define PULSE_PORT PORTD | |
| 53 #define PULSE_BIT PD2 | |
| 54 | |
| 55 volatile uint16_t data = 0; | |
| 56 volatile uint8_t data_len = 0; | |
| 57 volatile uint8_t bitbuf_len = 0; | |
| 58 volatile uint16_t bitbuf = 0; | |
| 59 | |
| 60 ISR ( INT0_vect ) { | |
| 61 writeBit(PORTD, 5, 1); | |
| 62 GICR &= ~_BV(INT0) ; // Disable INT0 | |
| 63 // Startsignal erkannt, ab hier den Timer2 starten, | |
| 64 // der liest dann alle 50µs den Zustand ein und schreibt das | |
| 65 // empfangene Bit in den Puffer | |
| 66 bitbuf = 0; // init | |
| 67 bitbuf_len = 0b10000000; // init 1 pulse received | |
| 68 TCNT2 = 0; | |
| 69 TIMSK |= _BV(OCIE2); //enable timer2 interrupt | |
| 70 writeBit(PORTD, 5, 0); | |
| 71 } | |
| 72 | |
| 73 | |
| 74 ISR ( TIMER2_COMP_vect ) { | |
| 75 writeBit(PORTD, 4, 0); | |
| 76 | |
| 77 uint8_t clock; | |
| 78 uint8_t state; | |
| 79 uint8_t state2; | |
| 80 if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff; | |
| 81 if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff; | |
| 82 if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff; | |
| 83 | |
| 84 if (clock) { | |
| 85 // second pulse of bit | |
| 86 bitbuf_len &= ~_BV(7); // switch clock to low | |
| 87 if ((state==state2) & state2) { | |
| 88 // two cycles high: packet end received | |
| 89 data_len = (bitbuf_len & 0b00111111); | |
| 90 if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets | |
| 91 TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt | |
| 92 GICR |= _BV(INT0) ; // Enable INT0 | |
| 93 data = bitbuf; // output data | |
| 94 } else { | |
| 95 bitbuf_len++; // increment bit counter | |
| 96 bitbuf = bitbuf << 1; // shift bits | |
| 97 if (state2 == 0) bitbuf |= 1; // receive logic one | |
| 98 } | |
| 99 } else { | |
| 100 // first pulse of bit | |
| 101 bitbuf_len |= _BV(7); // switch clock to high | |
| 102 if (state2) { | |
| 103 bitbuf_len |= _BV(6); // store new state | |
| 104 } else { | |
| 105 bitbuf_len &= ~_BV(6); // store new state | |
| 106 } | |
| 107 } | |
| 108 | |
| 109 | |
| 110 writeBit(PORTD, 4, 1); | |
| 111 } | |
| 112 | |
| 113 | |
| 114 | |
| 115 int main(void) | |
| 116 { | |
| 117 uint8_t i; | |
| 118 unsigned char s[30]; | |
| 119 | |
| 120 // setup data bit timer | |
| 121 TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match | |
| 122 OCR2 = TIMER2_50US; | |
| 123 TIMSK |= 1<<OCIE2; //enable timer2 interrupt | |
| 124 | |
| 125 MCUCR = _BV(ISC00); // falling edge | |
| 126 GICR = _BV(INT0) ; // Enable INT0 | |
| 127 | |
| 128 writeBit(DDRD, 4, 1); | |
| 129 writeBit(DDRD, 5, 1); | |
| 130 writeBit(DDRD, 6, 1); | |
| 131 | |
| 132 | |
| 133 RS232_init(); // initialize RS232 interface | |
| 134 RS232_puts_p(PSTR("CarreraShark 1.0 - INIT OK\n")); | |
| 135 //RS232_puts_p(PSTR("Receiving one complete cycle:\n")); | |
| 136 | |
| 137 sei(); | |
| 138 i = 0; | |
| 139 while (1) { | |
| 140 // main loop | |
| 141 | |
| 142 if (data != 0) { | |
| 143 if (data_len > 5) { | |
| 144 if (data_len == 13) { // sync to first packet | |
| 145 i = 1; | |
| 146 RS232_puts("\n"); | |
| 147 } else if (i!=0) i++; | |
| 148 if (i>0) { | |
| 149 itoa( data, s, 16); | |
| 150 data = 0; | |
| 151 RS232_puts("0x"); | |
| 152 RS232_puts( s ); | |
| 153 RS232_putc(' '); | |
| 154 } | |
| 155 } | |
| 156 //if (i==10) for (;;); | |
| 157 } | |
| 158 } // main loop end | |
| 159 }; | |
| 160 |
