diff -r 69c2a1408619 -r a399f9d5e672 carrerashark/main.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/carrerashark/main.c Fri Nov 18 12:16:22 2011 +0100 @@ -0,0 +1,160 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "main.h" + +#include "driver/rs232.h" +#include "util/delay.h" + + +static char buffer[RS232_BUFSIZE+1]; +static uint8_t buffer_len; + + + + +// USART0 RX interrupt +ISR ( USART_RXC_vect ) { + char c = UDR; + + // check for buffer overflow + if (buffer_len==sizeof(buffer)) { + buffer_len=0; + if (c == 27) { + // escape sequence, store to empty buffer + buffer[buffer_len++] = c; + } + } else { + // collect characters until end of line + if (c == 27) { + // escape sequence, clear buffer + buffer_len = 0; + buffer[buffer_len++] = c; + } else if ( (c==0xff) && (buffer_len > 3) ) { + buffer[buffer_len]=0; + + // packet end received, parse the received packet + + // wait for the next packet + buffer_len=0; + } else { + buffer[buffer_len++]=c; + } + } +} + + +#define PULSE_PORT PORTD +#define PULSE_BIT PD2 + +volatile uint16_t data = 0; +volatile uint8_t data_len = 0; +volatile uint8_t bitbuf_len = 0; +volatile uint16_t bitbuf = 0; + +ISR ( INT0_vect ) { + writeBit(PORTD, 5, 1); + GICR &= ~_BV(INT0) ; // Disable INT0 + // Startsignal erkannt, ab hier den Timer2 starten, + // der liest dann alle 50µs den Zustand ein und schreibt das + // empfangene Bit in den Puffer + bitbuf = 0; // init + bitbuf_len = 0b10000000; // init 1 pulse received + TCNT2 = 0; + TIMSK |= _BV(OCIE2); //enable timer2 interrupt + writeBit(PORTD, 5, 0); +} + + +ISR ( TIMER2_COMP_vect ) { + writeBit(PORTD, 4, 0); + + uint8_t clock; + uint8_t state; + uint8_t state2; + if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff; + if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff; + if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff; + + if (clock) { + // second pulse of bit + bitbuf_len &= ~_BV(7); // switch clock to low + if ((state==state2) & state2) { + // two cycles high: packet end received + data_len = (bitbuf_len & 0b00111111); + if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets + TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt + GICR |= _BV(INT0) ; // Enable INT0 + data = bitbuf; // output data + } else { + bitbuf_len++; // increment bit counter + bitbuf = bitbuf << 1; // shift bits + if (state2 == 0) bitbuf |= 1; // receive logic one + } + } else { + // first pulse of bit + bitbuf_len |= _BV(7); // switch clock to high + if (state2) { + bitbuf_len |= _BV(6); // store new state + } else { + bitbuf_len &= ~_BV(6); // store new state + } + } + + + writeBit(PORTD, 4, 1); +} + + + +int main(void) +{ + uint8_t i; + unsigned char s[30]; + + // setup data bit timer + TCCR2 = (1< 5) { + if (data_len == 13) { // sync to first packet + i = 1; + RS232_puts("\n"); + } else if (i!=0) i++; + if (i>0) { + itoa( data, s, 16); + data = 0; + RS232_puts("0x"); + RS232_puts( s ); + RS232_putc(' '); + } + } + //if (i==10) for (;;); + } + } // main loop end +}; +