comparison: blackbox/lowlevel.c
blackbox/lowlevel.c
- changeset 41
- 9857c18c5e64
- parent 37
- 136a79772098
- child 42
- 018d4d63ad3b
equal
deleted
inserted
replaced
| 40:c36bf33489f9 | 41:9857c18c5e64 |
|---|---|
| 103 // setup response receiver timer | 103 // setup response receiver timer |
| 104 TCCR0 = (1<<CS01); //divide by 8 | 104 TCCR0 = (1<<CS01); //divide by 8 |
| 105 // interrupt enable + tcnt0 set in timer2 | 105 // interrupt enable + tcnt0 set in timer2 |
| 106 | 106 |
| 107 | 107 |
| 108 // setup data bit timer | 108 // setup data bit + carid timer |
| 109 TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match | 109 TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match |
| 110 OCR2 = TIMER2_50US; | 110 OCR2 = TIMER2_50US; |
| 111 TIMSK |= 1<<OCIE2; //enable timer2 interrupt | 111 TIMSK |= 1<<OCIE2; //enable timer2 interrupt |
| 112 | 112 |
| 113 // enable carid interrupts | |
| 114 MCUCR = _BV(ISC00) | _BV(ISC01) | _BV(ISC10) | _BV(ISC11); // INT0/1 rising edge | |
| 115 GICR = _BV(INT0) | _BV(INT1) ; // Enable INT0 + INT1 | |
| 116 | |
| 117 | |
| 118 | |
| 113 // setup data packet timer | 119 // setup data packet timer |
| 114 //TCCR1A = (1<<COM1A1); | 120 TCCR1B = (1<<CS11) | (1<<WGM12); //divide by 8, set compare match (1mhz clock) |
| 115 TCCR1B = (1<<CS11) | (1<<WGM12); //divide by 8, set compare match | |
| 116 //TCCR1B = (1<<CS11) | (1<<CS10); //divide by 64 | |
| 117 //TCNT1 = TIMER_7500NS; | |
| 118 OCR1A = TIMER1_7500NS; | 121 OCR1A = TIMER1_7500NS; |
| 119 TIMSK |= 1<<OCIE1A; //enable timer1 interrupt | 122 TIMSK |= 1<<OCIE1A; //enable timer1 interrupt |
| 120 | 123 |
| 121 RS232_puts_p(PSTR("FreeSlot Blackbox v")); | 124 RS232_puts_p(PSTR("FreeSlot Blackbox v")); |
| 122 RS232_puts(VERSION); | 125 RS232_puts(VERSION); |
