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1 | #include <avr/interrupt.h> |
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2 | #include <avr/io.h> |
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3 | #include <avr/wdt.h> |
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4 | #include <avr/eeprom.h> |
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5 | #include <stdlib.h> |
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6 | #include <stdint.h> |
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7 | #include <avr/pgmspace.h> |
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8 | #include <util/delay.h> |
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9 | |
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10 | #include "driver/rs232.h" |
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11 | #include "driver/adc.h" |
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12 | |
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13 | #include "main.h" |
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14 | #include "lowlevel.h" |
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15 | |
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16 | void init_hardware(void) { |
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17 | RS232_init(); // initialize RS485 interface |
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18 | RS232_puts_p(PSTR("CARRERA beta loading\n")); |
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19 | |
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20 | initADC(); |
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21 | |
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22 | // set LED output |
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23 | DDR(LED1_PORT) |= _BV(LED1); |
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24 | DDR(LED2_PORT) |= _BV(LED2); |
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25 | DDR(LED3_PORT) |= _BV(LED3); |
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26 | DDR(LED4_PORT) |= _BV(LED4); |
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27 | DDR(LED5_PORT) |= _BV(LED5); |
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28 | |
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29 | // set Controller Input Pull-UPs |
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30 | CONTROLLER_PORT |= (_BV(CONTROLLER1_SW) | _BV(CONTROLLER2_SW) | _BV(CONTROLLER3_SW) | _BV(CONTROLLER4_SW)); |
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31 | |
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32 | // switch pull-ups |
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33 | SW_FUEL_PORT |= _BV(SW_FUEL); |
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34 | |
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35 | //RAIL_DETECT_PORT |= _BV(RAIL_DETECT); // enable internal pull-up |
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36 | DDR(RAIL_POWER_PORT) |= _BV(RAIL_POWER); |
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37 | |
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38 | |
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39 | LED(1, 1); _delay_ms(50); |
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40 | LED(2, 1); _delay_ms(50); |
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41 | LED(3, 1); _delay_ms(50); |
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42 | LED(4, 1); _delay_ms(50); |
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43 | LED(5, 1); _delay_ms(50); |
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44 | LED(1, 0); _delay_ms(50); |
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45 | LED(2, 0); _delay_ms(50); |
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46 | LED(3, 0); _delay_ms(50); |
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47 | LED(4, 0); _delay_ms(50); |
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48 | LED(5, 0); _delay_ms(50); |
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49 | |
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50 | //TCCR0 = (1<<CS01); //divide by 8 |
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51 | |
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52 | |
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53 | // setup data bit timer |
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54 | TCCR2 = (1<<CS21); //divide by 8 |
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55 | TCCR2 |= (1<<WGM21); // set compare match |
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56 | OCR2 = TIMER2_50US; |
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57 | TIMSK |= 1<<OCIE2; //enable timer2 interrupt |
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58 | |
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59 | // setup data packet timer |
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60 | //TCCR1A = (1<<COM1A1); |
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61 | TCCR1B = (1<<CS11); //divide by 8 |
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62 | TCCR1B |= (1<<WGM12); // set compare match |
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63 | //TCCR1B = (1<<CS11) | (1<<CS10); //divide by 64 |
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64 | //TCNT1 = TIMER_7500NS; |
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65 | OCR1A = TIMER1_7500NS; |
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66 | TIMSK |= 1<<OCIE1A; //enable timer1 interrupt |
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67 | |
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68 | RS232_puts_p(PSTR("INIT OK\n")); |
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69 | |
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70 | } |
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71 | |
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72 | |
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73 | |
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74 | volatile uint8_t datalen = 0; |
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75 | char data[10]; // 8 bytes data buffer + string termination |
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76 | |
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77 | static char buffer[RS232_BUFSIZE+1]; |
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78 | static uint8_t buffer_len; |
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79 | |
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80 | |
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81 | // USART0 RX interrupt |
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82 | ISR ( USART_RXC_vect ) { |
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83 | char c = UDR; |
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84 | |
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85 | // check for buffer overflow |
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86 | if (buffer_len==sizeof(buffer)) { |
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87 | buffer_len=0; |
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88 | if (c == 27) { |
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89 | // escape sequence, store to empty buffer |
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90 | buffer[buffer_len++] = c; |
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91 | } |
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92 | } else { |
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93 | // collect characters until end of line |
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94 | if (c == 27) { |
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95 | // escape sequence, clear buffer |
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96 | buffer_len = 0; |
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97 | buffer[buffer_len++] = c; |
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98 | } else if ( (c==0xff) && (buffer_len > 3) ) { |
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99 | buffer[buffer_len]=0; |
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100 | |
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101 | // packet end received, parse the received packet |
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102 | |
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103 | // wait for the next packet |
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104 | buffer_len=0; |
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105 | } else { |
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106 | buffer[buffer_len++]=c; |
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107 | } |
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108 | } |
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109 | } |
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110 | |
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111 | |
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112 | volatile uint16_t transmit_buffer; |
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113 | volatile uint16_t transmit_buffer_queue; |
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114 | volatile uint8_t transmit_len; |
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115 | volatile uint8_t transmit_len_next; |
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116 | volatile uint8_t transmit_len_queue; |
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117 | ISR ( TIMER2_COMP_vect ) { |
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118 | //OCR2 = TIMER2_50US; // make sure that timer2 is 50µs !!! |
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119 | // data packet timer 100µs pro bit... |
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120 | if (transmit_len >= 0xFE) { |
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121 | if (transmit_len != 0xFF) { |
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122 | RAIL_POWER_PORT |= _BV(RAIL_POWER); // end of transmission |
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123 | transmit_len = 0xFF; |
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124 | transmit_buffer = transmit_buffer_queue; |
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125 | transmit_buffer_queue = 0; |
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126 | transmit_len_next = transmit_len_queue; |
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127 | } |
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128 | } else { |
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129 | uint16_t bit = (1<<(transmit_len & 0b01111111)); |
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130 | uint16_t clock; |
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131 | if ((transmit_len & 0b10000000) == 0) clock = 0; else clock = 0xffff; |
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132 | if ( ((transmit_buffer ^ clock) & bit) != 0 ) |
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133 | RAIL_POWER_PORT |= _BV(RAIL_POWER); else |
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134 | RAIL_POWER_PORT &= ~_BV(RAIL_POWER); |
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135 | if ( (transmit_len & 0b10000000) == 0 ) { |
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136 | // block 0 |
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137 | //if (transmit_len == 0) transmit_len = 0xFF; else transmit_len |= 0b10000000; // set clock |
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138 | transmit_len |= 0b10000000; // set clock |
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139 | } else { |
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140 | // block 1, output the current bit |
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141 | transmit_len &= 0b01111111; // reset clock |
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142 | //if (transmit_len != 0) transmit_len--; // next bit |
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143 | if (transmit_len == 0) transmit_len = 0xFE; else transmit_len--; // next bit |
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144 | } |
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145 | } |
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146 | } |
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147 | |
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148 | int insert_queue(uint16_t tmp, uint8_t len) { |
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149 | if (transmit_buffer_queue == 0) { |
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150 | transmit_buffer_queue = tmp; |
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151 | transmit_len_queue = len; |
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152 | return 1; |
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153 | } |
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154 | return 0; |
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155 | } |
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156 | |
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157 | |
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158 | int do_controller(uint8_t controller) { |
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159 | // read controller X speed & encode controller data packet |
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160 | uint16_t tmp; |
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161 | switch (controller) { |
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162 | case 0: tmp = getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR; break; |
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163 | case 1: tmp = getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR; break; |
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164 | case 2: tmp = getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR; break; |
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165 | case 3: tmp = getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR; break; |
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166 | case 4: tmp = 0; break; // todo regler 5 |
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167 | case 5: tmp = 0; break; // todo regler 6 |
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168 | } |
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169 | tmp = 0b1000000000 | (controller << 6) | ((tmp & 0xF) << 1); |
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170 | if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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171 | if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER1_SW)) != 0) { |
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172 | tmp |= (1<<5); |
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173 | LED(controller+1, 0); |
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174 | } else LED(controller+1, 1); |
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175 | |
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176 | return insert_queue(tmp, 9); |
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177 | } |
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178 | |
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179 | unsigned char mirror( unsigned char n ) { |
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180 | // mirror all 8 bits |
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181 | n = ((n >> 1) & 0x55) | ((n << 1) & 0xaa); |
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182 | n = ((n >> 2) & 0x33) | ((n << 2) & 0xcc); |
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183 | n = ((n >> 4) & 0x0f) | ((n << 4) & 0xf0); |
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184 | return n; |
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185 | } |
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186 | |
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187 | |
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188 | int do_program(uint8_t controller, uint8_t command, uint8_t parameter) { |
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189 | // send program data packet |
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190 | uint16_t tmp; |
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191 | tmp = 0b1000000000000 | (mirror(parameter) << 4) | mirror(command)| (mirror(controller) >> 5); |
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192 | |
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193 | return insert_queue(tmp, 12); |
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194 | } |
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195 | |
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196 | int do_active(void) { |
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197 | // send controller active data packet |
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198 | uint16_t tmp = 0b10000000; |
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199 | if ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b11000001; |
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200 | if ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10100001; |
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201 | if ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10010001; |
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202 | if ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10001001; |
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203 | // todo: regler 5 und 6 |
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204 | |
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205 | return insert_queue(tmp, 7); |
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206 | } |
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207 | |
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208 | int do_pace_ghost(void) { |
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209 | // send ghost and pacecar data packet |
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210 | // todo: at the moment, both disabled! |
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211 | uint16_t tmp = 0b1111100000; |
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212 | if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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213 | // todo: PC, NH, TK, (KFR, FR) |
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214 | |
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215 | return insert_queue(tmp, 9); |
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216 | } |
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217 | |
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218 | ISR ( TIMER1_COMPA_vect ) { |
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219 | //OCR2 = 0xFF; // make sure that timer2 is synced to timer1, give enough cycles to prepare |
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220 | LED(4,2); |
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221 | // trigger packet transfer: |
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222 | transmit_len = transmit_len_next; |
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223 | |
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224 | // here is some more time to do something else... |
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225 | } |
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226 | |
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227 | |
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228 | int main(void) |
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229 | { |
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230 | |
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231 | unsigned char s[30]; |
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232 | uint16_t tmp; |
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233 | uint8_t packet_index = 1; |
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234 | |
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235 | |
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236 | init_hardware(); |
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237 | |
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238 | itoa(TIMER2_50US, s, 10); |
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239 | RS232_puts(s); |
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240 | |
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241 | // switch on rails power |
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242 | RAIL_POWER_PORT |= _BV(RAIL_POWER); |
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243 | |
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244 | while (1) { |
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245 | // check for short circuit on the rails |
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246 | check_rails_shortcut(); |
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247 | |
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248 | switch (packet_index) { |
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249 | case 1: |
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250 | if (do_program(7, 19, 0)) packet_index++; // reset |
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251 | //do_program(7, 16, 3); // led an startampel |
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252 | //do_program(0, 4, 0); // |
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253 | break; |
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254 | case 2: |
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255 | if (do_pace_ghost()) packet_index++; |
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256 | break; |
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257 | case 3: |
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258 | if (do_active()) packet_index++; |
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259 | break; |
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260 | case 4: |
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261 | if (do_controller(0)) packet_index++; |
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262 | break; |
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263 | case 5: |
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264 | if (do_controller(4)) packet_index++; |
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265 | break; |
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266 | case 6: |
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267 | if (do_controller(1)) packet_index++; |
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268 | break; |
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269 | case 7: |
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270 | if (do_controller(5)) packet_index++; |
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271 | break; |
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272 | case 8: |
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273 | if (do_controller(2)) packet_index++; |
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274 | break; |
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275 | case 9: |
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276 | if (do_active()) packet_index++; |
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277 | break; |
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278 | case 10: |
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279 | if (do_controller(3)) packet_index = 1; |
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280 | // last packet, so reset packet index |
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281 | break; |
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282 | } |
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283 | |
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284 | |
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285 | } // main loop end |
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286 | }; |
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287 |