blackbox/main.c

Tue, 06 Dec 2011 11:04:33 +0100

author
Malte Bayer <mbayer@neo-soft.org>
date
Tue, 06 Dec 2011 11:04:33 +0100
changeset 39
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parent 37
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child 41
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permissions
-rw-r--r--

some 2008 cu trace stuff

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1 #include <avr/interrupt.h>
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2 #include <avr/io.h>
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3 #include <avr/wdt.h>
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4 #include <avr/eeprom.h>
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5 #include <stdlib.h>
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6 #include <stdint.h>
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7 #include <avr/pgmspace.h>
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8 #include <util/delay.h>
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10 #include "driver/rs232.h"
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11 #include "driver/adc.h"
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12
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13 #include "main.h"
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14 #include "lowlevel.h"
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15
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16 char ok[] PROGMEM="OK\n";
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17 char busy[] PROGMEM="BUSY\n";
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18 char prepare[] PROGMEM="!RACE PREPARE\n";
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19 char countdownstart[] PROGMEM="!COUNTDOWN\n";
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20 char racestart[] PROGMEM="!RACE START\n";
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23 static uint8_t countdown, countdown_loops;
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24 uint8_t mode = 0;
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25 // valid race modes:
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26 // 0: free drive / idle
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27 // 1: waiting for countdown start
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28 // 2: race countdown initiated
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29 // 3: Race start condition
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32 #define MAX_SLOTS 6
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33 volatile uint8_t speedlimit[MAX_SLOTS];
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34 volatile uint8_t fuel[MAX_SLOTS];
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35 volatile uint8_t jumpstart_time[MAX_SLOTS];
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37
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38
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39 volatile uint8_t program_count = 0;
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40 volatile uint8_t program_id;
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41 volatile uint8_t program_command;
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42 volatile uint8_t program_parameter;
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43
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44 volatile uint8_t datalen = 0;
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45 char data[10]; // 8 bytes data buffer + string termination
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46
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47 static char buffer[RS232_BUFSIZE+1];
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48 static uint8_t buffer_len;
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49
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50
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51 volatile uint16_t transmit_buffer;
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52 volatile uint16_t transmit_buffer_queue;
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53 volatile uint8_t transmit_len;
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54 volatile uint8_t transmit_len_next;
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55 volatile uint8_t transmit_len_queue;
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56
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57 volatile uint16_t response;
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58 volatile uint8_t response_len;
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59 volatile uint8_t timer0_delay;
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60
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61
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62 int insert_queue(uint16_t tmp, uint8_t len) {
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63 if (transmit_buffer_queue == 0) {
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64 transmit_buffer_queue = tmp;
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65 transmit_len_queue = len;
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66 return 1;
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67 }
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68 return 0;
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69 }
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72
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73 ISR ( USART_RXC_vect ) {
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74 uint8_t tmp;
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75 char c = UDR;
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76
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77 // check for buffer overflow
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78 if (buffer_len==sizeof(buffer)) {
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79 buffer_len=0;
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80 } else {
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81 // collect characters until end of line
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82 if ( (c=='\n') ) {
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83 buffer[buffer_len]=0;
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84
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85 // packet end received, parse the received packet
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86 switch (buffer[0]) {
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87 case 'P': // inject a program data word to the rails
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88 if (program_count == 0) {
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89 program_id = buffer[3]-'0';
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90 program_command = buffer[1]-'0';
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91 if (program_command > 9)
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92 program_command = buffer[1]-'A'+10;
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93 program_parameter = buffer[2]-'0';
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94 if (program_parameter > 9)
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95 program_parameter = buffer[2]-'A'+10;
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96 if (program_command < 4)
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97 program_count = 0x02; // send commands twice (fuel, speed, brake)
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98 else
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99 program_count = 0x01;
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100 RS232_puts_p(ok);
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101 } else RS232_puts_p(busy);
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102 break;
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103
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104 case 'L': // Limit maximum speed for a car
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105 tmp = buffer[2]-'0';
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106 if (tmp > 9)
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107 tmp = buffer[2]-'A'+10;
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108 speedlimit[buffer[1]-'0'] = tmp;
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109 RS232_puts_p(ok);
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110 break;
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111
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112 case 'I': // get Information data (incl. important global parameter dump)
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113 RS232_puts(VERSION);
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114 RS232_putc(':');
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115 for (tmp=0;tmp<MAX_SLOTS;tmp++) RS232_putc(speedlimit[tmp]); // output speed limits
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116 RS232_putc(':');
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117 for (tmp=0;tmp<MAX_SLOTS;tmp++) RS232_putc(fuel[tmp]); // output fuel levels (0=empty, 100=full, 0xff=no fuel option)
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118 RS232_putc(':');
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119 for (tmp=0;tmp<MAX_SLOTS;tmp++) RS232_putc(jumpstart_time[tmp]); // output jumpstart times
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120 RS232_putc(':');
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121 RS232_putc('\n');
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122 break;
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123
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124 }
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125
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126 // wait for the next packet
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127 buffer_len=0;
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128 } else {
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129 buffer[buffer_len++]=c;
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130 }
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131 }
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132 }
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133
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134
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135 void jumpstart(uint8_t controller) {
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136 if (jumpstart_time[controller] == 0) {
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137 jumpstart_time[controller] = 1;
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138 // todo: later the timestamp should written instead of just "1"
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139 RS232_putc('~');
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140 RS232_putc('0'-controller);
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141 RS232_putc('\n');
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142 }
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143
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144 }
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146
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147 int do_controller(uint8_t controller) {
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148 // read controller X speed & encode controller data packet
37
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diff changeset
149 uint16_t tmp = 0;
0
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150 switch (controller) {
3
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diff changeset
151 case 0:
37
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diff changeset
152 if (mode!=1) tmp = ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) & 0x0F);
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diff changeset
153 if ((mode == 2) && (tmp != 0)) { jumpstart(controller); tmp = 0; }
36
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diff changeset
154 if (tmp > speedlimit[controller]) tmp = speedlimit[controller];
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diff changeset
155 tmp = tmp << 1;
10
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diff changeset
156 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER1_SW)) != 0) {
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diff changeset
157 tmp |= (1<<5);
37
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diff changeset
158 if (mode == 0) LED(1,0);
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diff changeset
159 } else if (mode == 0) LED(1,1);
3
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diff changeset
160 break;
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diff changeset
161 case 1:
37
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diff changeset
162 if (mode!=1) tmp = ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) & 0x0F);
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163 if ((mode == 2) && (tmp != 0)) { jumpstart(controller); tmp = 0; }
36
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diff changeset
164 if (tmp > speedlimit[controller]) tmp = speedlimit[controller];
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diff changeset
165 tmp = tmp << 1;
10
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diff changeset
166 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER2_SW)) != 0) {
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diff changeset
167 tmp |= (1<<5);
37
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diff changeset
168 if (mode == 0) LED(2,0);
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diff changeset
169 } else if (mode == 0) LED(2,1);
3
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170 break;
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diff changeset
171 case 2:
37
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172 if (mode!=1) tmp = ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) & 0x0F);
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173 if ((mode == 2) && (tmp != 0)) { jumpstart(controller); tmp = 0; }
36
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diff changeset
174 if (tmp > speedlimit[controller]) tmp = speedlimit[controller];
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175 tmp = tmp << 1;
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176 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER3_SW)) != 0) {
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177 tmp |= (1<<5);
37
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178 if (mode == 0) LED(4,0);
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179 } else if (mode == 0) LED(4,1);
3
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180 break;
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181 case 3:
37
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182 if (mode!=1) tmp = ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) & 0x0F);
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183 if ((mode == 2) && (tmp != 0)) { jumpstart(controller); tmp = 0; }
36
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184 if (tmp > speedlimit[controller]) tmp = speedlimit[controller];
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diff changeset
185 tmp = tmp << 1;
10
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186 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER4_SW)) != 0) {
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187 tmp |= (1<<5);
37
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188 if (mode == 0) LED(5,0);
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diff changeset
189 } else if (mode == 0) LED(5,1);
3
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190 break;
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191 case 4: tmp = (1<<5); break; // todo regler 5
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192 case 5: tmp = (1<<5); break; // todo regler 6
0
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193 }
34
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diff changeset
194 tmp |= (0b1000000000 | (controller << 6));
0
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195 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter
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196
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197 return insert_queue(tmp, 9);
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198 }
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199
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diff changeset
200 uint8_t mirror( uint8_t n ) {
0
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201 n = ((n >> 1) & 0x55) | ((n << 1) & 0xaa);
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202 n = ((n >> 2) & 0x33) | ((n << 2) & 0xcc);
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203 n = ((n >> 4) & 0x0f) | ((n << 4) & 0xf0);
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204 return n;
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205 }
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206
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207 int do_program(uint8_t controller, uint8_t command, uint8_t parameter) {
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208 // send program data packet
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209 uint16_t tmp;
4
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210 parameter = mirror(parameter);
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211 controller = mirror(controller);
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212 command = mirror(command);
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213 tmp = 0b1000000000000 | (parameter << 4) | command | (controller >> 5);
0
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214 return insert_queue(tmp, 12);
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215 }
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216
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217 int do_active(void) {
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218 // send controller active data packet
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219 uint16_t tmp = 0b10000000;
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220 if ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b11000001;
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221 if ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10100001;
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222 if ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10010001;
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223 if ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10001001;
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diff changeset
224 // todo: regler 5 und 6
4
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225 // todo: wenn Daten enpfangen wurden hier eine Quittierung senden anstatt dem Active Word
0
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226
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227 return insert_queue(tmp, 7);
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228 }
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229
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230 int do_pace_ghost(void) {
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231 // send ghost and pacecar data packet
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232 // todo: at the moment, both disabled!
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233 uint16_t tmp = 0b1111100000;
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234 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter
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235 // todo: PC, NH, TK, (KFR, FR)
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236
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237 return insert_queue(tmp, 9);
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238 }
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diff changeset
239
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240 ISR ( TIMER1_COMPA_vect ) {
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diff changeset
241 // trigger packet transfer:
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242 transmit_len = transmit_len_next;
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243 // here is some more time to do something else...
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244 }
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245
6
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diff changeset
246 ISR ( TIMER2_COMP_vect ) {
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diff changeset
247 //OCR2 = TIMER2_50US; // make sure that timer2 is 50µs !!!
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diff changeset
248 // data packet timer 100µs pro bit...
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diff changeset
249 if (transmit_len >= 0xFE) {
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diff changeset
250 if (transmit_len != 0xFF) {
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diff changeset
251 RAIL_POWER_PORT |= _BV(RAIL_POWER); // end of transmission
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diff changeset
252 transmit_len = 0xFF;
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diff changeset
253 transmit_buffer = transmit_buffer_queue;
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diff changeset
254 transmit_buffer_queue = 0;
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diff changeset
255 transmit_len_next = transmit_len_queue;
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diff changeset
256
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diff changeset
257 // start the response receiver timer
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diff changeset
258 // TODO: only on 8 timeslots, not on every transmission
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diff changeset
259 // TODO: give slot number to timer - then store the transmission to 8 slots array
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diff changeset
260 TCNT0 = TIMER0_250US;
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diff changeset
261 timer0_delay = TIMER0_2300NS;
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diff changeset
262 response = 0;
33
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diff changeset
263 response_len = 0;
6
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diff changeset
264 TIMSK |= _BV(TOIE0);
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diff changeset
265
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diff changeset
266 }
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diff changeset
267 } else {
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diff changeset
268 uint16_t bit = (1<<(transmit_len & 0b01111111));
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diff changeset
269 uint16_t clock;
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diff changeset
270 if ((transmit_len & 0b10000000) == 0) clock = 0; else clock = 0xffff;
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diff changeset
271 if ( ((transmit_buffer ^ clock) & bit) != 0 )
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diff changeset
272 RAIL_POWER_PORT |= _BV(RAIL_POWER); else
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diff changeset
273 RAIL_POWER_PORT &= ~_BV(RAIL_POWER);
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diff changeset
274 if ( (transmit_len & 0b10000000) == 0 ) {
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diff changeset
275 // block 0
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diff changeset
276 //if (transmit_len == 0) transmit_len = 0xFF; else transmit_len |= 0b10000000; // set clock
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diff changeset
277 transmit_len |= 0b10000000; // set clock
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diff changeset
278 } else {
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diff changeset
279 // block 1, output the current bit
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280 transmit_len &= 0b01111111; // reset clock
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diff changeset
281 //if (transmit_len != 0) transmit_len--; // next bit
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diff changeset
282 if (transmit_len == 0) transmit_len = 0xFE; else transmit_len--; // next bit
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diff changeset
283 }
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diff changeset
284 }
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diff changeset
285 }
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diff changeset
286
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diff changeset
287
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diff changeset
288 ISR ( TIMER0_OVF_vect ) {
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diff changeset
289 // TODO: last bit should be set by the sender, not from us!
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290 TCNT0 = TIMER0_250US;
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diff changeset
291 if (timer0_delay == 0) {
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diff changeset
292 RAIL_POWER_PORT &= ~_BV(RAIL_POWER); // pull rails low
8
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293 _delay_us(28); // wait some cycles
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diff changeset
294 if ((PIN(RAIL_DETECT_PORT) & _BV(RAIL_DETECT)) != 0) { // check for logic zero
6
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diff changeset
295 if (response == 0) {
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parents: 5
diff changeset
296 // there is no start bit, so stop the timer and cancel response receiving
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297 TIMSK &= ~_BV(TOIE0);
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diff changeset
298 } else {
8
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diff changeset
299 // we received a bit (logic low)
6
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300 response = response << 1;
33
c261350bb394 fixed shortcut detection
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diff changeset
301 response_len++;
6
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diff changeset
302 }
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diff changeset
303 } else {
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parents: 5
diff changeset
304 // okay, we have logic high
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diff changeset
305 response = response << 1;
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diff changeset
306 response |= 1;
33
c261350bb394 fixed shortcut detection
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diff changeset
307 response_len++;
6
2405aff29a51 added response receiver timer
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diff changeset
308 }
33
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diff changeset
309 if (response_len == 15) { // maximum response length reached
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diff changeset
310 RAIL_POWER_PORT |= _BV(RAIL_POWER); // restore rails power
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diff changeset
311 TIMSK &= ~_BV(TOIE0);
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diff changeset
312 } else {
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diff changeset
313 _delay_us(20); // wait some cycles
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314 RAIL_POWER_PORT |= _BV(RAIL_POWER); // restore rails power
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315 }
6
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diff changeset
316 } else timer0_delay--; // 2.3 ms delay not reached yet
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317 }
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diff changeset
318
7
f4e250d5402b fixes, bound lap counter reset to race start button
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diff changeset
319 ISR (INT2_vect) {
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diff changeset
320 // Lap counter Interrupt
37
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diff changeset
321 // do not know if this ever occurs ?! this is normally an output pin to trigger the counter start
7
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322 }
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323
36
aea84f4f5a12 feature: program a specific controller speed limit without changing the car's acceleration
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diff changeset
324 void reset_vars(void) {
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diff changeset
325 uint8_t i;
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diff changeset
326 for (i=0; i<MAX_SLOTS; i++) {
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diff changeset
327 speedlimit[i] = 15;
37
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328 fuel[i] = 100;
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329 jumpstart_time[i] = 0;
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330 }
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331 }
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332
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diff changeset
333 void countdown_progress(void) {
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334 // decrement COUNTDOWN_LOOPS
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335 if (countdown_loops>0) {
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336 countdown_loops--;
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337 } else {
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338 countdown--;
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339 countdown_loops = COUNTDOWN_DELAY;
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340 }
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diff changeset
341 switch (countdown) {
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diff changeset
342 case 5: LED(1, 1); break;
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diff changeset
343 case 4: LED(2, 1); break;
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diff changeset
344 case 3: LED(3, 1); break;
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345 case 2: LED(4, 1); break;
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346 case 1: LED(5, 1); break;
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347 case 0: { // RACE START!
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348 LEDS_OFF();
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349 LED(3, 1);
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diff changeset
350 mode = 3;
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351 } break;
36
aea84f4f5a12 feature: program a specific controller speed limit without changing the car's acceleration
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diff changeset
352 }
aea84f4f5a12 feature: program a specific controller speed limit without changing the car's acceleration
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353 }
aea84f4f5a12 feature: program a specific controller speed limit without changing the car's acceleration
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parents: 35
diff changeset
354
0
9b7de464f0ea initial commit - controller1 working
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parents:
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355
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parents:
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356 int main(void)
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parents:
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357 {
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parents:
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358
37
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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diff changeset
359 unsigned char s[10];
0
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parents:
diff changeset
360 uint8_t packet_index = 1;
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parents:
diff changeset
361
8
84249ab5d691 debugging stuff
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diff changeset
362 uint8_t btn_start = _BV(SW_START);
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diff changeset
363 uint8_t old_start = btn_start;
0
9b7de464f0ea initial commit - controller1 working
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parents:
diff changeset
364
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parents:
diff changeset
365 init_hardware();
36
aea84f4f5a12 feature: program a specific controller speed limit without changing the car's acceleration
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diff changeset
366 reset_vars();
37
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diff changeset
367 LED(3, 1); // enable middle led == idle mode
0
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parents:
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368
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parents:
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369 // switch on rails power
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370 RAIL_POWER_PORT |= _BV(RAIL_POWER);
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parents:
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371
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parents:
diff changeset
372 while (1) {
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373 // check for short circuit on the rails
2
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diff changeset
374 check_rails_shortcut();
0
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parents:
diff changeset
375
33
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diff changeset
376 if (response_len > 0) {
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diff changeset
377 itoa(response, s, 2);
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378 response_len = 0;
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diff changeset
379 RS232_puts("ANSWER RX: ");
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diff changeset
380 RS232_puts(s);
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381 RS232_putc('\n');
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382 }
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diff changeset
383
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diff changeset
384
7
f4e250d5402b fixes, bound lap counter reset to race start button
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diff changeset
385 // read in button presses
8
84249ab5d691 debugging stuff
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diff changeset
386 btn_start = (PIN(SW_START_PORT) & _BV(SW_START));
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diff changeset
387 if (old_start != btn_start) {
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diff changeset
388 // start button changed
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diff changeset
389 if (btn_start == 0) {
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diff changeset
390 // start button press active
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diff changeset
391 if (mode == 0) {
37
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diff changeset
392 mode = 1; // set wait for race start mode
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diff changeset
393 reset_vars();
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diff changeset
394 LED(1, 1);
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diff changeset
395 LED(2, 1);
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diff changeset
396 LED(3, 1);
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diff changeset
397 LED(4, 1);
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diff changeset
398 LED(5, 1);
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diff changeset
399 RS232_puts_p(prepare);
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diff changeset
400 } else if (mode == 1) {
8
84249ab5d691 debugging stuff
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diff changeset
401 // Initiate race countdown
37
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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diff changeset
402 countdown = 5;
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parents: 36
diff changeset
403 countdown_loops = COUNTDOWN_DELAY;
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diff changeset
404 mode = 2;
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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parents: 36
diff changeset
405 LED(1, 0);
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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diff changeset
406 LED(2, 0);
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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parents: 36
diff changeset
407 LED(3, 0);
136a79772098 implemented race prepare phase, countdown and jumpstart detection
Malte Bayer <mbayer@neo-soft.org>
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diff changeset
408 LED(4, 0);
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diff changeset
409 LED(5, 0);
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diff changeset
410 RS232_puts_p(countdownstart);
8
84249ab5d691 debugging stuff
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parents: 7
diff changeset
411 }
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diff changeset
412 }
37
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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diff changeset
413 old_start = btn_start;
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diff changeset
414 }
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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parents: 36
diff changeset
415
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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diff changeset
416 if (mode==3) {
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parents: 36
diff changeset
417 // RACE START!
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parents: 36
diff changeset
418 // issue reset command to lap counter
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diff changeset
419 mode = 0;
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diff changeset
420 RS232_puts_p(racestart);
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diff changeset
421 program_command = 6;
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diff changeset
422 program_parameter = 9;
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diff changeset
423 program_id = 0;
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diff changeset
424 program_count = 1;
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diff changeset
425 LAP_COUNTER_PORT |= _BV(LAP_COUNTER);
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parents: 36
diff changeset
426 // TODO: beep long
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diff changeset
427 _delay_us(50);
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diff changeset
428 LAP_COUNTER_PORT &= ~_BV(LAP_COUNTER);
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diff changeset
429 }
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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parents: 36
diff changeset
430
7
f4e250d5402b fixes, bound lap counter reset to race start button
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parents: 6
diff changeset
431
2
6c59b4293fa9 finished: rails short circuit check
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parents: 0
diff changeset
432 switch (packet_index) {
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parents: 0
diff changeset
433 case 1:
4
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parents: 3
diff changeset
434 if (program_count > 0) {
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parents: 3
diff changeset
435 // command in queue
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parents: 3
diff changeset
436 if (do_program(program_id, program_command, program_parameter)) {
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parents: 3
diff changeset
437 packet_index++;
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diff changeset
438 program_count--;
58529e14c45c implemented rs232 program word injection
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parents: 3
diff changeset
439 }
58529e14c45c implemented rs232 program word injection
Malte Bayer <mbayer@neo-soft.org>
parents: 3
diff changeset
440 } else {
58529e14c45c implemented rs232 program word injection
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parents: 3
diff changeset
441 // output idle command
11
69c2a1408619 done code for sniffing the rails
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parents: 10
diff changeset
442 if (do_program(7, 19, 0)) packet_index++; // reset
8
84249ab5d691 debugging stuff
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diff changeset
443 //if (do_program(7, 20, 15)) packet_index++; // reset / pitstop detect
11
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parents: 10
diff changeset
444 //if (insert_queue(0, 0)) packet_index++; // null command
4
58529e14c45c implemented rs232 program word injection
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parents: 3
diff changeset
445 }
37
136a79772098 implemented race prepare phase, countdown and jumpstart detection
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parents: 36
diff changeset
446
136a79772098 implemented race prepare phase, countdown and jumpstart detection
Malte Bayer <mbayer@neo-soft.org>
parents: 36
diff changeset
447 if ( (packet_index>1) && (mode == 2) ) countdown_progress();
136a79772098 implemented race prepare phase, countdown and jumpstart detection
Malte Bayer <mbayer@neo-soft.org>
parents: 36
diff changeset
448
2
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
449 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
450 case 2:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
451 if (do_pace_ghost()) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
452 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
453 case 3:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
454 if (do_active()) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
455 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
456 case 4:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
457 if (do_controller(0)) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
458 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
459 case 5:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
460 if (do_controller(4)) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
461 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
462 case 6:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
463 if (do_controller(1)) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
464 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
465 case 7:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
466 if (do_controller(5)) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
467 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
468 case 8:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
469 if (do_controller(2)) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
470 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
471 case 9:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
472 if (do_active()) packet_index++;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
473 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
474 case 10:
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
475 if (do_controller(3)) packet_index = 1;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
476 // last packet, so reset packet index
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
477 break;
6c59b4293fa9 finished: rails short circuit check
Malte Bayer <mbayer@neo-soft.org>
parents: 0
diff changeset
478 }
0
9b7de464f0ea initial commit - controller1 working
Malte Bayer <mbayer@neo-soft.org>
parents:
diff changeset
479
9b7de464f0ea initial commit - controller1 working
Malte Bayer <mbayer@neo-soft.org>
parents:
diff changeset
480
9b7de464f0ea initial commit - controller1 working
Malte Bayer <mbayer@neo-soft.org>
parents:
diff changeset
481 } // main loop end
9b7de464f0ea initial commit - controller1 working
Malte Bayer <mbayer@neo-soft.org>
parents:
diff changeset
482 };
9b7de464f0ea initial commit - controller1 working
Malte Bayer <mbayer@neo-soft.org>
parents:
diff changeset
483

mercurial