Mercurial > hg-public > freeslot / file revision

#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/wdt.h>
#include <avr/eeprom.h>
#include <stdlib.h>
#include <stdint.h>
#include <avr/pgmspace.h>

#include "main.h"

#include "driver/rs232.h"
#include "util/delay.h"


static char buffer[RS232_BUFSIZE+1];
static uint8_t buffer_len;




// USART0 RX interrupt
ISR ( USART_RXC_vect ) {
    char c = UDR;

    // check for buffer overflow
    if (buffer_len==sizeof(buffer)) {
        buffer_len=0;
        if (c == 27) {
            // escape sequence, store to empty buffer
            buffer[buffer_len++] = c;
        }
    }  else {
        // collect characters until end of line
        if (c == 27) {
            // escape sequence, clear buffer
            buffer_len = 0;
            buffer[buffer_len++] = c;
        } else if ( (c==0xff) && (buffer_len > 3) ) {
            buffer[buffer_len]=0;

            // packet end received, parse the received packet

            // wait for the next packet
            buffer_len=0;
        } else {
            buffer[buffer_len++]=c;
        }
    }
}


#define PULSE_PORT      PORTD
#define PULSE_BIT       PD2

volatile uint16_t data = 0;
volatile uint8_t data_len = 0;
volatile uint8_t bitbuf_len = 0;
volatile uint16_t bitbuf = 0;

ISR ( INT0_vect ) {
    PORTD ^= _BV(PD3);
    GICR &= ~_BV(INT0) ; // Disable INT0
    // Startsignal erkannt, ab hier den Timer2 starten,
    // der liest dann alle 50µs den Zustand ein und schreibt das
    // empfangene Bit in den Puffer
    bitbuf = 0; // init
    bitbuf_len = 0b10000000; // init 1 pulse received
    TCNT2 = 0;
    TIMSK |= _BV(OCIE2); //enable timer2 interrupt
}


ISR ( TIMER2_COMP_vect ) {
    PORTD ^= _BV(PD4);
    uint8_t clock;
    uint8_t state;
    uint8_t state2;
    if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff;
    if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff;
    if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff;

    if (clock) {
        // second pulse of bit
        bitbuf_len &= ~_BV(7); // switch clock to low
        if ((state==state2) & state2) {
            // two cycles high: packet end received
            data_len = (bitbuf_len & 0b00111111);
            if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets
            TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt
            GICR |= _BV(INT0) ; // Enable INT0
            data = bitbuf; // output data
        } else {
            bitbuf_len++; // increment bit counter
            bitbuf = bitbuf << 1; // shift bits
            if (state2 == 0) bitbuf |= 1; // receive logic one
        }
    } else {
        // first pulse of bit
        bitbuf_len |= _BV(7); // switch clock to high
        if (state2) {
            bitbuf_len |= _BV(6); // store new state
        } else {
            bitbuf_len &= ~_BV(6); // store new state
        }
    }
}



int main(void)
{
    uint8_t i;
    unsigned char s[10];
    uint16_t tmp;
    uint16_t cycle[11];

    // setup data bit timer
    TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match
    OCR2 = TIMER2_50US;
    TIMSK |= 1<<OCIE2; //enable timer2 interrupt

    MCUCR = _BV(ISC00); // falling edge
    GICR = _BV(INT0) ; // Enable INT0

    DDRD |= _BV(PD3) | _BV(PD4) | _BV(PD5);

    RS232_init(); // initialize RS232 interface
    RS232_puts_p(PSTR("CarreraShark 1.1\n"));

    sei();
    i = 0;
    while (1) {
        // main loop

        if (data != 0) {
            if (data_len > 5) {
                tmp = data;
                data = 0;
                if (data_len == 13) { // sync to first packet
                    PORTD ^= _BV(PD5);
                    for (i=0; i<10;i++ ) {
                        // output previous cycle data
                        itoa( cycle[i], s, 16);
                        RS232_putc('0');
                        RS232_putc('x');
                        RS232_puts( s );
                        RS232_putc(' ');
                    }
                    RS232_putc('*');
                    i = 0;
                    PORTD ^= _BV(PD5);
                }
                cycle[i] = tmp;
                i++;
            }
            //if (i==10) for (;;);
        }
    } // main loop end
};