Mercurial > hg-public > freeslot / file revision

CarreraShark
Rail data packet sniffer

Hardware: Mega16, 8mhz
    PD2 = Controller Input
    |>o = Inv Schmitt Trigger for signal buffering (74hc14)

    [RAIL+] ------[33kohm]------+-----|>o--|>0----[PD2]
                                |
                                --[10kohm]---
                                            |
    [RAIL-] --------------------------------+-----[GND]


Debug Pins:
    PD3 = Packet Start pulse
    PD4 = Bit timer pulse (50ns)
    PD5 = Cycle Sync: each low/high change == start of cycle (after program packet received)