22 char data[10]; // 8 bytes data buffer + string termination |
22 char data[10]; // 8 bytes data buffer + string termination |
23 |
23 |
24 static char buffer[RS232_BUFSIZE+1]; |
24 static char buffer[RS232_BUFSIZE+1]; |
25 static uint8_t buffer_len; |
25 static uint8_t buffer_len; |
26 |
26 |
27 // USART0 RX interrupt |
27 |
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28 volatile uint16_t transmit_buffer; |
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29 volatile uint16_t transmit_buffer_queue; |
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30 volatile uint8_t transmit_len; |
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31 volatile uint8_t transmit_len_next; |
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32 volatile uint8_t transmit_len_queue; |
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33 |
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34 volatile uint16_t response; |
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35 volatile uint8_t timer0_delay; |
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36 |
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37 |
28 ISR ( USART_RXC_vect ) { |
38 ISR ( USART_RXC_vect ) { |
29 char c = UDR; |
39 char c = UDR; |
30 |
40 |
31 // check for buffer overflow |
41 // check for buffer overflow |
32 if (buffer_len==sizeof(buffer)) { |
42 if (buffer_len==sizeof(buffer)) { |
62 } |
72 } |
63 } |
73 } |
64 } |
74 } |
65 |
75 |
66 |
76 |
67 volatile uint16_t transmit_buffer; |
77 |
68 volatile uint16_t transmit_buffer_queue; |
78 int insert_queue(uint16_t tmp, uint8_t len) { |
69 volatile uint8_t transmit_len; |
79 if (transmit_buffer_queue == 0) { |
70 volatile uint8_t transmit_len_next; |
80 transmit_buffer_queue = tmp; |
71 volatile uint8_t transmit_len_queue; |
81 transmit_len_queue = len; |
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82 return 1; |
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83 } |
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84 return 0; |
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85 } |
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86 |
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87 |
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88 int do_controller(uint8_t controller) { |
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89 // read controller X speed & encode controller data packet |
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90 uint16_t tmp; |
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91 switch (controller) { |
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92 case 0: |
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93 tmp = ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
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94 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER1_SW)) != 0) tmp |= (1<<5); |
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95 break; |
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96 case 1: |
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97 tmp = ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
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98 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER2_SW)) != 0) tmp |= (1<<5); |
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99 break; |
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100 case 2: |
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101 tmp = ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
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102 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER3_SW)) != 0) tmp |= (1<<5); |
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103 break; |
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104 case 3: |
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105 tmp = ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
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106 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER4_SW)) != 0) tmp |= (1<<5); |
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107 break; |
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108 case 4: tmp = (1<<5); break; // todo regler 5 |
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109 case 5: tmp = (1<<5); break; // todo regler 6 |
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110 } |
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111 tmp |= 0b1000000000 | (controller << 6); |
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112 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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113 |
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114 return insert_queue(tmp, 9); |
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115 } |
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116 |
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117 uint8_t mirror( uint8_t n ) { |
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118 n = ((n >> 1) & 0x55) | ((n << 1) & 0xaa); |
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119 n = ((n >> 2) & 0x33) | ((n << 2) & 0xcc); |
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120 n = ((n >> 4) & 0x0f) | ((n << 4) & 0xf0); |
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121 return n; |
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122 } |
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123 |
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124 int do_program(uint8_t controller, uint8_t command, uint8_t parameter) { |
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125 // send program data packet |
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126 uint16_t tmp; |
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127 parameter = mirror(parameter); |
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128 controller = mirror(controller); |
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129 command = mirror(command); |
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130 tmp = 0b1000000000000 | (parameter << 4) | command | (controller >> 5); |
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131 return insert_queue(tmp, 12); |
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132 } |
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133 |
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134 int do_active(void) { |
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135 // send controller active data packet |
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136 uint16_t tmp = 0b10000000; |
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137 if ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b11000001; |
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138 if ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10100001; |
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139 if ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10010001; |
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140 if ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10001001; |
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141 // todo: regler 5 und 6 |
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142 // todo: wenn Daten enpfangen wurden hier eine Quittierung senden anstatt dem Active Word |
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143 |
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144 return insert_queue(tmp, 7); |
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145 } |
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146 |
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147 int do_pace_ghost(void) { |
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148 // send ghost and pacecar data packet |
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149 // todo: at the moment, both disabled! |
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150 uint16_t tmp = 0b1111100000; |
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151 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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152 // todo: PC, NH, TK, (KFR, FR) |
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153 |
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154 return insert_queue(tmp, 9); |
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155 } |
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156 |
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157 ISR ( TIMER1_COMPA_vect ) { |
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158 // trigger packet transfer: |
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159 transmit_len = transmit_len_next; |
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160 LED(2,2); |
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161 |
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162 // here is some more time to do something else... |
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163 } |
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164 |
72 ISR ( TIMER2_COMP_vect ) { |
165 ISR ( TIMER2_COMP_vect ) { |
73 //OCR2 = TIMER2_50US; // make sure that timer2 is 50µs !!! |
166 //OCR2 = TIMER2_50US; // make sure that timer2 is 50µs !!! |
74 // data packet timer 100µs pro bit... |
167 // data packet timer 100µs pro bit... |
75 if (transmit_len >= 0xFE) { |
168 if (transmit_len >= 0xFE) { |
76 if (transmit_len != 0xFF) { |
169 if (transmit_len != 0xFF) { |
77 RAIL_POWER_PORT |= _BV(RAIL_POWER); // end of transmission |
170 RAIL_POWER_PORT |= _BV(RAIL_POWER); // end of transmission |
78 transmit_len = 0xFF; |
171 transmit_len = 0xFF; |
79 transmit_buffer = transmit_buffer_queue; |
172 transmit_buffer = transmit_buffer_queue; |
80 transmit_buffer_queue = 0; |
173 transmit_buffer_queue = 0; |
81 transmit_len_next = transmit_len_queue; |
174 transmit_len_next = transmit_len_queue; |
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175 |
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176 // start the response receiver timer |
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177 // TODO: only on 8 timeslots, not on every transmission |
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178 // TODO: give slot number to timer - then store the transmission to 8 slots array |
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179 TCNT0 = TIMER0_250US; |
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180 timer0_delay = TIMER0_2300NS; |
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181 response = 0; |
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182 TIMSK |= _BV(TOIE0); |
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183 |
82 } |
184 } |
83 } else { |
185 } else { |
84 uint16_t bit = (1<<(transmit_len & 0b01111111)); |
186 uint16_t bit = (1<<(transmit_len & 0b01111111)); |
85 uint16_t clock; |
187 uint16_t clock; |
86 if ((transmit_len & 0b10000000) == 0) clock = 0; else clock = 0xffff; |
188 if ((transmit_len & 0b10000000) == 0) clock = 0; else clock = 0xffff; |
96 transmit_len &= 0b01111111; // reset clock |
198 transmit_len &= 0b01111111; // reset clock |
97 //if (transmit_len != 0) transmit_len--; // next bit |
199 //if (transmit_len != 0) transmit_len--; // next bit |
98 if (transmit_len == 0) transmit_len = 0xFE; else transmit_len--; // next bit |
200 if (transmit_len == 0) transmit_len = 0xFE; else transmit_len--; // next bit |
99 } |
201 } |
100 } |
202 } |
101 } |
203 |
102 |
204 LED(3,2); |
103 int insert_queue(uint16_t tmp, uint8_t len) { |
205 } |
104 if (transmit_buffer_queue == 0) { |
206 |
105 transmit_buffer_queue = tmp; |
207 |
106 transmit_len_queue = len; |
208 ISR ( TIMER0_OVF_vect ) { |
107 return 1; |
209 // TODO: last bit should be set by the sender, not from us! |
108 } |
210 TCNT0 = TIMER0_250US; |
109 return 0; |
211 LED(1,2); |
110 } |
212 if (timer0_delay == 0) { |
111 |
213 RAIL_POWER_PORT &= ~_BV(RAIL_POWER); // pull rails low |
112 |
214 _delay_us(25); // wait some cycles |
113 int do_controller(uint8_t controller) { |
215 if ((PIN(RAIL_POWER_PORT) & _BV(RAIL_POWER)) == 0) { // check for logic zero |
114 // read controller X speed & encode controller data packet |
216 if (response == 0) { |
115 uint16_t tmp; |
217 // there is no start bit, so stop the timer and cancel response receiving |
116 switch (controller) { |
218 TIMSK &= ~_BV(TOIE0); |
117 case 0: |
219 } else { |
118 tmp = ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
220 // we received a logic low |
119 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER1_SW)) != 0) tmp |= (1<<5); |
221 response = response << 1; |
120 break; |
222 } |
121 case 1: |
223 } else { |
122 tmp = ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
224 // okay, we have logic high |
123 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER2_SW)) != 0) tmp |= (1<<5); |
225 response = response << 1; |
124 break; |
226 response |= 1; |
125 case 2: |
227 } |
126 tmp = ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
228 _delay_us(23); // wait some cycles |
127 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER3_SW)) != 0) tmp |= (1<<5); |
229 RAIL_POWER_PORT |= _BV(RAIL_POWER); // restore rails power |
128 break; |
230 } else timer0_delay--; // 2.3 ms delay not reached yet |
129 case 3: |
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130 tmp = ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) & 0xF) << 1; |
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131 if ( (PIN(CONTROLLER_PORT) & _BV(CONTROLLER4_SW)) != 0) tmp |= (1<<5); |
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132 break; |
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133 case 4: tmp = (1<<5); break; // todo regler 5 |
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134 case 5: tmp = (1<<5); break; // todo regler 6 |
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135 } |
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136 tmp |= 0b1000000000 | (controller << 6); |
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137 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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138 |
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139 return insert_queue(tmp, 9); |
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140 } |
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141 |
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142 uint8_t mirror( uint8_t n ) { |
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143 n = ((n >> 1) & 0x55) | ((n << 1) & 0xaa); |
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144 n = ((n >> 2) & 0x33) | ((n << 2) & 0xcc); |
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145 n = ((n >> 4) & 0x0f) | ((n << 4) & 0xf0); |
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146 return n; |
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147 } |
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148 |
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149 int do_program(uint8_t controller, uint8_t command, uint8_t parameter) { |
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150 // send program data packet |
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151 uint16_t tmp; |
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152 parameter = mirror(parameter); |
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153 controller = mirror(controller); |
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154 command = mirror(command); |
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155 tmp = 0b1000000000000 | (parameter << 4) | command | (controller >> 5); |
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156 return insert_queue(tmp, 12); |
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157 } |
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158 |
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159 int do_active(void) { |
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160 // send controller active data packet |
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161 uint16_t tmp = 0b10000000; |
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162 if ((getADC(CONTROLLER1_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b11000001; |
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163 if ((getADC(CONTROLLER2_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10100001; |
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164 if ((getADC(CONTROLLER3_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10010001; |
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165 if ((getADC(CONTROLLER4_SPEED) / CONTROLLER_DIVISOR) > 0) tmp |= 0b10001001; |
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166 // todo: regler 5 und 6 |
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167 // todo: wenn Daten enpfangen wurden hier eine Quittierung senden anstatt dem Active Word |
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168 |
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169 return insert_queue(tmp, 7); |
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170 } |
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171 |
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172 int do_pace_ghost(void) { |
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173 // send ghost and pacecar data packet |
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174 // todo: at the moment, both disabled! |
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175 uint16_t tmp = 0b1111100000; |
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176 if ( (PIN(SW_FUEL_PORT) & _BV(SW_FUEL)) != 0) tmp |= 1; // benzinstand aktiv - tankmodusschalter |
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177 // todo: PC, NH, TK, (KFR, FR) |
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178 |
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179 return insert_queue(tmp, 9); |
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180 } |
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181 |
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182 ISR ( TIMER1_COMPA_vect ) { |
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183 //OCR2 = 0xFF; // make sure that timer2 is synced to timer1, give enough cycles to prepare |
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184 LED(4,2); |
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185 // trigger packet transfer: |
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186 transmit_len = transmit_len_next; |
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187 |
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188 // here is some more time to do something else... |
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189 } |
231 } |
190 |
232 |
191 |
233 |
192 int main(void) |
234 int main(void) |
193 { |
235 { |