Fri, 09 Dec 2011 11:54:19 +0100
added livemode display to slotcli, without communication yet
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1 | #ifndef MAIN_H |
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2 | #define MAIN_H |
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3 | |
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4 | #include <avr/wdt.h> |
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5 | #include <stdint.h> |
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6 | |
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7 | #define VERSION "1.3" |
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8 | |
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9 | #define COUNTDOWN_DELAY 10 // x/10 seconds |
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10 | |
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11 | // Hardware config |
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12 | #define LAP_COUNTER_PORT PORTB |
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13 | #define LAP_COUNTER PB2 |
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14 | |
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15 | #define MODUL_PORT PORTD |
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16 | #define MODUL_ST4 PD5 |
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17 | #define MODUL_ST6 PD6 |
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18 | |
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19 | #define I2C_PORT PORTC |
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20 | #define I2C_SCL PC0 |
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21 | #define I2C_SDA PC1 |
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22 | |
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23 | #define LED1_PORT PORTA |
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24 | #define LED2_PORT PORTA |
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25 | #define LED3_PORT PORTC |
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26 | #define LED4_PORT PORTC |
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27 | #define LED5_PORT PORTC |
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28 | #define LED1 PA4 |
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29 | #define LED2 PA5 |
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30 | #define LED3 PC7 |
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31 | #define LED4 PC2 |
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32 | #define LED5 PC3 |
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33 | |
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34 | #define SW_PACECAR_PORT PORTC |
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35 | #define SW_START_PORT PORTB |
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36 | #define SW_FUEL_PORT PORTB |
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37 | #define SW_PACECAR PC6 |
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38 | #define SW_FUEL PB0 |
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39 | #define SW_START PB1 |
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40 | |
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41 | #define SPEAKER_PORT PORTD |
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42 | #define SPEAKER PD7 |
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43 | |
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44 | #define RAIL_POWER_PORT PORTD |
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45 | #define RAIL_POWER PD4 // high = rails powered |
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46 | #define RAIL_DETECT_PORT PORTA |
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47 | #define RAIL_DETECT PA7 // low = short circuit detection |
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48 | |
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49 | #define CONTROLLER_PORT PORTB |
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50 | #define CONTROLLER_MAX 360 // full throttle ADC value |
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51 | #define CONTROLLER_DIVISOR (uint8_t)(CONTROLLER_MAX/15) |
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52 | #define CONTROLLER1_SW PB4 |
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53 | #define CONTROLLER2_SW PB5 |
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54 | #define CONTROLLER3_SW PB6 |
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55 | #define CONTROLLER4_SW PB7 |
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56 | #define CONTROLLER1_SPEED 0 // ADC channel # |
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57 | #define CONTROLLER2_SPEED 1 // ADC channel # |
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58 | #define CONTROLLER3_SPEED 2 // ADC channel # |
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59 | #define CONTROLLER4_SPEED 3 // ADC channel # |
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60 | |
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61 | // TIMING STUFF |
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62 | /* |
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63 | #define TIMER0_DIVISOR 8 |
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64 | #define VALUE_50US 0.45e-4 |
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65 | #define TIMER_50US 0xff - (uint8_t)(VALUE_50US * F_CPU/TIMER0_DIVISOR) |
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66 | */ |
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67 | /* |
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68 | #define VALUE_7500NS 0.85e-2 |
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69 | #define TIMER_7500NS 0xffff - (uint16_t)(VALUE_7500NS * F_CPU/TIMER1_DIVISOR) |
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70 | */ |
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71 | //#define TIMER_7500NS (uint16_t)(VALUE_7500NS * F_CPU/TIMER1_DIVISOR) |
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72 | #define TIMER0_DIVISOR 8 |
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73 | #define VALUE0_250US 0.25e-3 |
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74 | #define TIMER0_250US 0xff - (uint8_t)(VALUE0_250US * F_CPU/TIMER0_DIVISOR) |
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75 | #define TIMER0_2300NS (uint8_t)(2300/250) |
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76 | |
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77 | #define TIMER2_DIVISOR 8 |
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78 | #define VALUE2_50US 0.50e-4 |
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79 | #define TIMER2_50US (uint8_t)(VALUE2_50US * F_CPU/TIMER2_DIVISOR) |
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80 | #define VALUE2_250US 2.5e-4 |
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81 | #define TIMER2_250US (uint8_t)((VALUE2_250US * F_CPU/TIMER2_DIVISOR) - 2) |
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82 | |
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83 | #define TIMER1_DIVISOR 8 |
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84 | #define VALUE1_7500NS 0.75e-2 |
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85 | #define TIMER1_7500NS (uint16_t)(VALUE1_7500NS * F_CPU/TIMER1_DIVISOR) |
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86 | #define VALUE1_500NS 0.5e-3 |
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87 | #define TIMER1_500NS (uint16_t)((VALUE1_500NS * F_CPU/TIMER1_DIVISOR) + 2) // MEASURE THIS EXACTLY WITH SCOPE |
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88 | |
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89 | #define DDR(x) (*(&x - 1)) // address of data direction register of port x |
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90 | #define PIN(x) (*(&x - 2)) // address of input register of port x |
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91 | |
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92 | |
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93 | |
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94 | // MAYBE USELESS STUFF: |
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95 | |
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96 | #define uchar unsigned char |
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97 | #define uint unsigned int |
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98 | |
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99 | // Macro used to write to a single I/O pin |
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100 | #define writeBit(port,bit,value) { if ((value)>0) (port) |= (1<<bit); else (port) &= ~(1<<bit); } |
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101 | |
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102 | // Macro used to read from a single I/O pin |
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103 | #define readBit(port,bit) (((port) >> (bit)) & 1) |
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104 | |
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105 | // we have internal AREF... |
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106 | // #define EXT_AREF 1 |
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107 | |
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108 | #endif |