Fri, 09 Dec 2011 19:53:20 +0100
added car5+6 to trackswitch detector
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1 | #include <avr/interrupt.h> |
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2 | #include <avr/io.h> |
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3 | #include <avr/wdt.h> |
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4 | #include <avr/eeprom.h> |
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5 | #include <stdlib.h> |
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6 | #include <stdint.h> |
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7 | #include <avr/pgmspace.h> |
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8 | |
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9 | #include "main.h" |
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10 | |
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11 | #include "driver/rs232.h" |
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12 | #include "util/delay.h" |
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13 | |
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14 | |
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15 | volatile char buffer[RS232_BUFSIZE+1]; |
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16 | volatile uint8_t buffer_len = 0; |
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17 | |
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18 | volatile uint8_t showall = 0; |
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19 | |
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20 | // USART0 RX interrupt |
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21 | ISR ( USART_RXC_vect ) { |
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22 | char c = UDR; |
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23 | |
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24 | // check for buffer overflow |
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25 | if (buffer_len==sizeof(buffer)) { |
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26 | buffer_len=0; |
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27 | if (c == 27) { |
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28 | // escape sequence, store to empty buffer |
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29 | buffer[buffer_len++] = c; |
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30 | } |
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31 | } else { |
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32 | // collect characters until end of line |
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33 | if (c == 27) { |
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34 | // escape sequence, clear buffer |
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35 | buffer_len = 0; |
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36 | buffer[buffer_len++] = c; |
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37 | } else if ( (c=='\n') && (buffer_len > 3) ) { |
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38 | buffer[buffer_len]=0; |
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39 | |
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40 | // packet end received, parse the received packet |
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41 | if (buffer[0] == 'A') { |
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42 | showall = 1; |
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43 | RS232_puts_p(PSTR("Entering Livemode\n")); |
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44 | } |
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45 | if (buffer[0] == 'C') { |
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46 | showall = 0; |
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47 | RS232_puts_p(PSTR("Showing only changes\n")); |
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48 | } |
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49 | |
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50 | // wait for the next packet |
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51 | buffer_len=0; |
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52 | } else { |
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53 | buffer[buffer_len++]=c; |
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54 | } |
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55 | } |
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56 | } |
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57 | |
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58 | |
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59 | #define PULSE_PORT PORTD |
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60 | #define PULSE_BIT PD2 |
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61 | |
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62 | volatile uint16_t data = 0; |
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63 | volatile uint8_t data_len = 0; |
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64 | volatile uint16_t response = 0; |
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65 | volatile uint8_t response_len = 0; |
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66 | volatile uint8_t bitbuf_len = 0; |
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67 | volatile uint16_t bitbuf = 0; |
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68 | |
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69 | volatile uint8_t sysclock = 0; |
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70 | ISR ( TIMER0_OVF_vect ) { |
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71 | PORTD ^= _BV(PD6); |
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72 | if (sysclock != 0xff) sysclock++; |
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73 | } |
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74 | |
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75 | ISR ( INT0_vect ) { |
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76 | PORTD ^= _BV(PD3); |
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77 | if ((sysclock > 0) && (sysclock<10)) { |
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78 | // this is the answer slot start bit?? |
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79 | // configure the bitbuf to start receive of answer data |
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80 | if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) != 0) { |
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81 | PORTD ^= _BV(PD7); // set indicator |
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82 | OCR2 = TIMER2_250US; |
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83 | GICR &= ~_BV(INT0) ; // Disable INT0 |
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84 | bitbuf = 0; // init |
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85 | bitbuf_len = 0b00100000; // init zero, first pulse is checked by timer, set answer receive flag! |
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86 | // START BIT RECEIVED! |
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87 | //OCR2 = TIMER2_250US; |
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88 | TCNT2 = 1; |
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89 | TIMSK |= _BV(OCIE2); //enable timer2 interrupt |
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90 | } else { |
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91 | OCR2 = TIMER2_50US; |
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92 | } |
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93 | |
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94 | } else { |
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95 | GICR &= ~_BV(INT0) ; // Disable INT0 |
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96 | // Startsignal erkannt, ab hier den Timer2 starten, |
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97 | // der liest dann alle 50µs den Zustand ein und schreibt das |
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98 | // empfangene Bit in den Puffer |
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99 | bitbuf = 0; // init |
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100 | bitbuf_len = 0b10000000; // init 1 pulse received |
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101 | OCR2 = TIMER2_50US; |
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102 | TCNT2 = 0; |
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103 | TIMSK |= _BV(OCIE2); //enable timer2 interrupt |
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104 | } |
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105 | } |
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106 | |
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107 | |
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108 | ISR ( TIMER2_COMP_vect ) { |
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109 | PORTD ^= _BV(PD4); |
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110 | uint8_t clock, state, state2, rxa; |
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111 | |
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112 | |
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113 | if ((bitbuf_len & 0b00100000) == 0) rxa = 0; else rxa = 0xff; |
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114 | if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff; |
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115 | |
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116 | if (rxa == 0) { |
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117 | // receive a standard packet |
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118 | if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff; |
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119 | if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff; |
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120 | |
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121 | if (clock) { |
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122 | // second pulse of bit |
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123 | bitbuf_len &= ~_BV(7); // switch clock to low |
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124 | if ((state==state2) & state2) { |
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125 | // two cycles high: packet end received |
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126 | data_len = (bitbuf_len & 0b00011111); |
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127 | data = bitbuf; // output data |
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128 | if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets |
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129 | sysclock = 0; // reset system clock counter |
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130 | TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt |
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131 | GICR |= _BV(INT0); // Enable INT0 |
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132 | // GIFR &= ~_BV(INTF0); // clear int0 irq flag |
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133 | } else { |
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134 | bitbuf_len++; // increment bit counter |
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135 | bitbuf = bitbuf << 1; // shift bits |
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136 | if (state2 == 0) bitbuf |= 1; // receive logic one |
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137 | } |
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138 | } else { |
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139 | // first pulse of bit |
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140 | bitbuf_len |= _BV(7); // switch clock to high |
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141 | if (state2) { |
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142 | bitbuf_len |= _BV(6); // store new state |
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143 | } else { |
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144 | bitbuf_len &= ~_BV(6); // store new state |
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145 | } |
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146 | } |
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147 | } else { |
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148 | // receive an answer packet! |
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149 | if ((bitbuf_len & 0xF) < 0xE) { |
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150 | // receive one of max 15 bits to buffer |
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151 | bitbuf_len++; |
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152 | bitbuf = bitbuf << 1; // shift bits |
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153 | if (state2 != 0) bitbuf |= 1; // receive logic one |
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154 | } else { |
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155 | OCR2 = TIMER2_50US; |
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156 | // END OF ANSWER |
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157 | response_len = (bitbuf_len & 0b00011111); |
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158 | response = bitbuf; // output data (full 16bits) |
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159 | PORTD ^= _BV(PD7); |
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160 | TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt |
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161 | GICR |= _BV(INT0); // Enable INT0 |
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162 | } |
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163 | } |
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164 | } |
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165 | |
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166 | |
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167 | |
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168 | int main(void) |
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169 | { |
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170 | uint8_t i, cycle_changed; |
29 | 171 | unsigned char s[10]; |
172 | uint16_t tmp; | |
173 | uint16_t cycle[11]; | |
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174 | uint16_t cycle_old[11]; |
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175 | |
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176 | // setup data bit timer |
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177 | TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match |
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178 | OCR2 = TIMER2_50US; |
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179 | TIMSK |= 1<<OCIE2; //enable timer2 interrupt |
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180 | |
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181 | // setup system timer |
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182 | TCCR0 = (1<<CS21); //divide by 8 |
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183 | TIMSK |= 1<<TOIE0; //enable timer0 interrupt |
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184 | |
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185 | |
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186 | MCUCR = _BV(ISC01); // falling edge |
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187 | // MCUCR = _BV(ISC00) | _BV(ISC01); // rising edge |
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188 | GICR = _BV(INT0) ; // Enable INT0 |
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189 | |
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190 | DDRD |= _BV(PD3) | _BV(PD4) | _BV(PD5) | _BV(PD6) | _BV(PD7); |
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191 | PORTD |= _BV(PD7); |
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192 | |
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193 | RS232_init(); // initialize RS232 interface |
39 | 194 | RS232_puts_p(PSTR("CarreraShark 1.2\nA = Show all data live\nC = Show only when prog high changes")); |
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195 | |
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196 | sei(); |
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197 | i = 0; |
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198 | while (1) { |
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199 | // main loop |
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200 | |
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201 | if (response != 0) { |
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202 | RS232_puts_p(PSTR("RX: ")); |
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203 | itoa(response, s, 2); |
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204 | response = 0; |
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205 | RS232_puts( s ); |
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206 | RS232_putc('\n'); |
39 | 207 | //while (1) ; |
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208 | } |
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209 | |
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210 | if (data != 0) { |
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211 | if (data_len > 5) { |
29 | 212 | tmp = data; |
213 | data = 0; | |
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214 | if (data_len == 13) { // sync to first packet |
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215 | PORTD ^= _BV(PD5); |
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216 | if (showall == 0) { |
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217 | // compare old & new cycle |
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218 | cycle_changed = 0; |
39 | 219 | for (i=0; i<10;i++ ) if ( (cycle[i] & 0xff00) != (cycle_old[i] & 0xff00) ) cycle_changed = 1; |
29 | 220 | } |
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221 | if ( (showall != 0) || (cycle_changed != 0) ) { |
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222 | for (i=0; i<10;i++ ) { |
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223 | // output previous cycle data |
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224 | itoa( cycle[i], s, 16); |
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225 | RS232_putc('0'); |
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226 | RS232_putc('x'); |
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227 | RS232_puts( s ); |
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228 | RS232_putc(' '); |
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229 | } |
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230 | if (showall != 0) RS232_putc('*'); else RS232_putc('\n'); |
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231 | } |
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232 | if (showall == 0) for (i=0; i<10;i++ ) cycle_old[i] = cycle[i]; |
29 | 233 | i = 0; |
234 | PORTD ^= _BV(PD5); | |
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235 | } |
29 | 236 | cycle[i] = tmp; |
237 | i++; | |
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238 | } |
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239 | //if (i==10) for (;;); |
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240 | } |
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241 | } // main loop end |
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242 | }; |
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243 |