carrerashark/main.c

Sat, 03 Dec 2011 13:53:44 +0100

author
Malte Bayer <mbayer@neo-soft.org>
date
Sat, 03 Dec 2011 13:53:44 +0100
changeset 35
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parent 31
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child 38
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permissions
-rw-r--r--

cli: implemented setting of fuel, brake, speed, blinkstate for any car

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1 #include <avr/interrupt.h>
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2 #include <avr/io.h>
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3 #include <avr/wdt.h>
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4 #include <avr/eeprom.h>
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5 #include <stdlib.h>
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6 #include <stdint.h>
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7 #include <avr/pgmspace.h>
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9 #include "main.h"
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11 #include "driver/rs232.h"
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12 #include "util/delay.h"
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15 static char buffer[RS232_BUFSIZE+1];
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16 static uint8_t buffer_len;
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21 // USART0 RX interrupt
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22 ISR ( USART_RXC_vect ) {
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23 char c = UDR;
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24
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25 // check for buffer overflow
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26 if (buffer_len==sizeof(buffer)) {
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27 buffer_len=0;
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28 if (c == 27) {
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29 // escape sequence, store to empty buffer
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30 buffer[buffer_len++] = c;
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31 }
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32 } else {
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33 // collect characters until end of line
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34 if (c == 27) {
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35 // escape sequence, clear buffer
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36 buffer_len = 0;
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37 buffer[buffer_len++] = c;
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38 } else if ( (c==0xff) && (buffer_len > 3) ) {
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39 buffer[buffer_len]=0;
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40
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41 // packet end received, parse the received packet
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42
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43 // wait for the next packet
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44 buffer_len=0;
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45 } else {
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46 buffer[buffer_len++]=c;
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47 }
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48 }
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49 }
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51
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52 #define PULSE_PORT PORTD
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53 #define PULSE_BIT PD2
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54
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55 volatile uint16_t data = 0;
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56 volatile uint8_t data_len = 0;
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57 volatile uint8_t bitbuf_len = 0;
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58 volatile uint16_t bitbuf = 0;
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59
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60 volatile uint16_t sysclock = 0;
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61 ISR ( TIMER0_OVF_vect ) {
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62 PORTD ^= _BV(PD6);
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63 if (sysclock != 0xffff) sysclock++;
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64 }
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65
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66 ISR ( INT0_vect ) {
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67 PORTD ^= _BV(PD3);
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68 if (sysclock<10) {
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69 // this is the answer slot start bit??
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70 PORTD ^= _BV(PD7);
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71 } else {
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72 GICR &= ~_BV(INT0) ; // Disable INT0
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73 // Startsignal erkannt, ab hier den Timer2 starten,
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74 // der liest dann alle 50µs den Zustand ein und schreibt das
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75 // empfangene Bit in den Puffer
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76 bitbuf = 0; // init
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77 bitbuf_len = 0b10000000; // init 1 pulse received
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78 TCNT2 = 0;
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79 TIMSK |= _BV(OCIE2); //enable timer2 interrupt
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80 }
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81 }
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84 ISR ( TIMER2_COMP_vect ) {
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85 PORTD ^= _BV(PD4);
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86 uint8_t clock;
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87 uint8_t state;
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88 uint8_t state2;
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89 if ((bitbuf_len & 0b10000000) == 0) clock = 0; else clock = 0xff;
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90 if ((bitbuf_len & 0b01000000) == 0) state = 0; else state = 0xff;
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91 if ((PIN(PULSE_PORT) & _BV(PULSE_BIT)) == 0) state2 = 0; else state2 = 0xff;
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92
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93 if (clock) {
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94 // second pulse of bit
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95 bitbuf_len &= ~_BV(7); // switch clock to low
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96 if ((state==state2) & state2) {
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97 // two cycles high: packet end received
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98 data_len = (bitbuf_len & 0b00111111);
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99 if (data_len == 13) PORTD ^= _BV(6); // debug sync output on program packets
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100 TIMSK &= ~_BV(OCIE2); //disable timer2 interrupt
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101 GICR |= _BV(INT0); // Enable INT0
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102 GIFR &= ~_BV(INTF0); // clear int0 irq flag
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103 data = bitbuf; // output data
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104 sysclock = 0; // reset system clock counter
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105 } else {
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106 bitbuf_len++; // increment bit counter
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107 bitbuf = bitbuf << 1; // shift bits
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108 if (state2 == 0) bitbuf |= 1; // receive logic one
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109 }
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110 } else {
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111 // first pulse of bit
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112 bitbuf_len |= _BV(7); // switch clock to high
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113 if (state2) {
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114 bitbuf_len |= _BV(6); // store new state
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115 } else {
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116 bitbuf_len &= ~_BV(6); // store new state
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117 }
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118 }
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119 }
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123 int main(void)
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124 {
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125 uint8_t i;
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126 unsigned char s[10];
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127 uint16_t tmp;
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128 uint16_t cycle[11];
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129
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130 // setup data bit timer
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131 TCCR2 = (1<<CS21) | (1<<WGM21); //divide by 8, set compare match
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132 OCR2 = TIMER2_50US;
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133 TIMSK |= 1<<OCIE2; //enable timer2 interrupt
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134
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135 // setup system timer
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136 TCCR0 = (1<<CS21); //divide by 8
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137 TIMSK |= 1<<TOIE0; //enable timer0 interrupt
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138
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139
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140 MCUCR = _BV(ISC00); // falling edge
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141 // MCUCR = _BV(ISC00) | _BV(ISC01); // rising edge
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142 GICR = _BV(INT0) ; // Enable INT0
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143
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144 DDRD |= _BV(PD3) | _BV(PD4) | _BV(PD5) | _BV(PD6) | _BV(PD7);
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145 PORTD |= _BV(PD7);
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146
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147 RS232_init(); // initialize RS232 interface
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148 RS232_puts_p(PSTR("CarreraShark 1.2\n"));
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149
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150 sei();
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151 i = 0;
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152 while (1) {
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153 // main loop
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154
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155 if (data != 0) {
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156 if (data_len > 5) {
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157 tmp = data;
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158 data = 0;
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159 if (data_len == 13) { // sync to first packet
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160 PORTD ^= _BV(PD5);
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161 for (i=0; i<10;i++ ) {
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162 // output previous cycle data
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163 itoa( cycle[i], s, 16);
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164 RS232_putc('0');
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165 RS232_putc('x');
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166 RS232_puts( s );
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167 RS232_putc(' ');
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168 }
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169 RS232_putc('*');
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170 i = 0;
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171 PORTD ^= _BV(PD5);
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172 }
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173 cycle[i] = tmp;
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174 i++;
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175 }
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176 //if (i==10) for (;;);
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177 }
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178 } // main loop end
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179 };
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180

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